MEMORY HAVING A CONTINUOUS CHANNEL
    11.
    发明申请
    MEMORY HAVING A CONTINUOUS CHANNEL 有权
    具有连续通道的记忆

    公开(公告)号:US20160099252A1

    公开(公告)日:2016-04-07

    申请号:US14831011

    申请日:2015-08-20

    Abstract: The present disclosure includes memory having a continuous channel, and methods of processing the same. A number of embodiments include forming a vertical stack having memory cells connected in series between a source select gate and a drain select gate, wherein forming the vertical stack includes forming a continuous channel for the source select gate, the memory cells, and the drain select gate, and removing a portion of the continuous channel for the drain select gate such that the continuous channel is thinner for the drain select gate than for the memory cells and the source select gate.

    Abstract translation: 本公开包括具有连续信道的存储器及其处理方法。 许多实施例包括形成具有串联连接在源选择栅极和漏极选择栅极之间的存储单元的垂直堆叠,其中形成垂直堆叠包括形成用于源选择栅极,存储器单元和漏极选择的连续沟道 栅极,并且去除用于漏极选择栅极的连续沟道的一部分,使得连续沟道对于漏极选择栅极比对于存储器单元和源选择栅极更薄。

    Memory Arrays
    12.
    发明申请
    Memory Arrays 有权
    记忆阵列

    公开(公告)号:US20150333143A1

    公开(公告)日:2015-11-19

    申请号:US14281569

    申请日:2014-05-19

    Abstract: Some embodiments include a memory array which has a stack of alternating first and second levels. Channel material pillars extend through the stack, and vertically-stacked memory cell strings are along the channel material pillars. A common source is under the stack and electrically coupled to the channel material pillars. The common source has conductive protective material over and directly against metal silicide, with the conductive protective material being a composition other than metal silicide. Some embodiments include methods of fabricating integrated structures.

    Abstract translation: 一些实施例包括具有交替的第一和第二电平的堆叠的存储器阵列。 通道材料柱延伸通过堆叠,并且垂直堆叠的存储器单元串沿着通道材料柱。 一个共同的来源在堆叠下,并且电耦合到通道材料柱。 普通源在金属硅化物上方具有导电保护材料,并且直接抵抗金属硅化物,导电保护材料是金属硅化物以外的组合物。 一些实施例包括制造集成结构的方法。

    Methods of forming assemblies having heavily doped regions

    公开(公告)号:US11658033B2

    公开(公告)日:2023-05-23

    申请号:US16950115

    申请日:2020-11-17

    Inventor: Yushi Hu Shu Qin

    Abstract: Some embodiments include an integrated assembly having a first semiconductor structure containing heavily-doped silicon, a germanium-containing interface material over the first semiconductor structure, and a second semiconductor structure over the germanium-containing interface material. The second semiconductor structure has a heavily-doped lower region adjacent the germanium-containing interface material and has a lightly-doped upper region above the heavily-doped lower region. The lightly-doped upper region and heavily-doped lower region are majority doped to a same dopant type, and join to one another along a boundary region. Some embodiments include an integrated assembly having germanium oxide between a first silicon-containing structure and a second silicon-containing structure. Some embodiments include methods of forming assemblies.

    Memory having a continuous channel
    14.
    发明授权

    公开(公告)号:US11315941B2

    公开(公告)日:2022-04-26

    申请号:US16291453

    申请日:2019-03-04

    Abstract: The present disclosure includes memory having a continuous channel, and methods of processing the same. A number of embodiments include forming a vertical stack having memory cells connected in series between a source select gate and a drain select gate, wherein forming the vertical stack includes forming a continuous channel for the source select gate, the memory cells, and the drain select gate, and removing a portion of the continuous channel for the drain select gate such that the continuous channel is thinner for the drain select gate than for the memory cells and the source select gate.

    Integrated structures
    18.
    发明授权

    公开(公告)号:US10355018B1

    公开(公告)日:2019-07-16

    申请号:US16290169

    申请日:2019-03-01

    Abstract: Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. Vertically-extending monolithic channel material is adjacent the select device gate material and the conductive levels. The monolithic channel material contains a lower segment adjacent the select device gate material and an upper segment adjacent the conductive levels. A first vertically-extending region is between the lower segment of the monolithic channel material and the select device gate material. The first vertically-extending region contains a first material. A second vertically-extending region is between the upper segment of the monolithic channel material and the conductive levels. The second vertically-extending region contains a material which is different in composition from the first material.

Patent Agency Ranking