公开(公告)号：US20100133902A1

公开(公告)日：2010-06-03

申请号：US12598392

申请日：2009-02-26

申请人： Tetsuji Gotou ,  Hiroo Yamamoto

发明人： Tetsuji Gotou ,  Hiroo Yamamoto

IPC分类号： H02J1/00

CPC分类号： H03K19/0016 ,  H03K17/24 ,  Y10T307/305 ,  Y10T307/615

摘要： A power supply potential detecting circuit detects a power supply potential of a second circuit block when a first circuit block shifts from a power supply shutdown state to a power supply feeding state or shifts from the power supply feeding state to the power supply shutdown state. Then, an operation control circuit temporarily stops a function of the second circuit block when the first circuit block shifts from the power supply shutdown state to the power supply feeding state or shifts from the power supply feeding state to the power supply shutdown state and then recovers the function of the second circuit block based on a detection result outputted from the power supply potential detecting circuit.

摘要翻译： 当第一电路块从电源关闭状态转换到电源馈送状态或从电源馈送状态转换到电源关闭状态时，电源电位检测电路检测第二电路块的电源电位。 然后，当第一电路块从电源关闭状态转换到电源供给状态或从电源供给状态转换到电源关闭状态时，操作控制电路暂时停止第二电路块的功能，然后恢复 基于从电源电位检测电路输出的检测结果的第二电路块的功能。

公开(公告)号：US07148735B2

公开(公告)日：2006-12-12

申请号：US11191009

申请日：2005-07-28

申请人： Miwa Ito ,  Kazuyuki Nakanishi ,  Akio Hirata ,  Hiroo Yamamoto ,  Tsuguyasu Hatsuda

发明人： Miwa Ito ,  Kazuyuki Nakanishi ,  Akio Hirata ,  Hiroo Yamamoto ,  Tsuguyasu Hatsuda

IPC分类号： H03L5/00

CPC分类号： H03K3/356113 ,  H03K3/011

摘要： In a level shifter, in the case where the amplitude voltage of an input signal (i.e., a first power voltage VDDL) input to an input terminal is changed to be higher and the amplitude voltage of an output signal (i.e., a second power voltage VDDH) output from an output terminal is changed to be lower, a fall delay time of the signal output from the output terminal tends to be longer than a rise delay time of the signal. However, an inverted input signal obtained by an inverter is input to a level shifting unit and also to the gate of an N-type transistor, and therefore, the N-type transistor is turned on at the fall of the input signal input to the input terminal, so as to supply a current based on the second power voltage VDDH to an output node of the level shifting unit for assisting the shift into H level performed in the level shifting unit. Accordingly, even when at least one of the amplitude voltage of the input signal and the amplitude voltage of the output signal is changed, balance between the fall delay time characteristic and the rise delay time characteristic of the output signal can be satisfactorily kept.

摘要翻译： 在电平移位器中，输入到输入端子的输入信号（即，第一电源电压VDDL）的振幅电压变化为较高，输出信号的振幅电压（即，第二电源电压 从输出端子输出的VDDH）变低，从输出端子输出的信号的下降延迟时间趋于长于信号的上升延迟时间。 然而，由逆变器获得的反相输入信号被输入到电平移位单元，并输入到N型晶体管的栅极，因此，在输入信号的输入信号的下降时，N型晶体管导通 输入端子，以便将基于第二电源电压VDDH的电流提供给电平移位单元的输出节点，用于辅助在电平转换单元中执行的向H电平的移位。 因此，即使当输入信号的振幅电压和输出信号的振幅电压中的至少一个改变时，也能够令人满意地保持输出信号的下降延迟时间特性和上升延迟时间特性之间的平衡。

公开(公告)号：US06316263B1

公开(公告)日：2001-11-13

申请号：US09318767

申请日：1999-05-26

申请人： Hiroshige Itakura ,  Kazuo Kondo ,  Masahiro Kimura ,  Hiroo Yamamoto

发明人： Hiroshige Itakura ,  Kazuo Kondo ,  Masahiro Kimura ,  Hiroo Yamamoto

IPC分类号： G01N3372

CPC分类号： C12Q1/28 ,  C12Q1/26

摘要： A method for measuring antioxidant activity of test samples, which attains higher sensitivity than the conventional methods is disclosed. In the method of this invention, methemoglobin, an oxidizing agent which oxidizes methemoglobin, a coloring agent which generates color by reaction with methemoglobin in the presence of the oxidizing agent, and a test sample whose antioxidant activity is to be measured are reacted, and the generated color is measured.

摘要翻译： 公开了一种测量样品的抗氧化活性的方法，其比常规方法获得更高的灵敏度。 在本发明的方法中，使氧化高铁血红蛋白的氧化剂，在氧化剂存在下与高铁血红蛋白反应产生着色剂的着色剂和测定抗氧化活性的试验片发生反应， 生成的颜色被测量。

公开(公告)号：US08390146B2

公开(公告)日：2013-03-05

申请号：US12598392

申请日：2009-02-26

申请人： Tetsuji Gotou ,  Hiroo Yamamoto

发明人： Tetsuji Gotou ,  Hiroo Yamamoto

IPC分类号： H02J1/10

CPC分类号： H03K19/0016 ,  H03K17/24 ,  Y10T307/305 ,  Y10T307/615

摘要： A power supply potential detecting circuit detects a power supply potential of a second circuit block when a first circuit block shifts from a power supply shutdown state to a power supply feeding state or shifts from the power supply feeding state to the power supply shutdown state. Then, an operation control circuit temporarily stops a function of the second circuit block when the first circuit block shifts from the power supply shutdown state to the power supply feeding state or shifts from the power supply feeding state to the power supply shutdown state and then recovers the function of the second circuit block based on a detection result outputted from the power supply potential detecting circuit.

摘要翻译： 当第一电路块从电源关闭状态转换到电源馈送状态或从电源馈送状态转换到电源关闭状态时，电源电位检测电路检测第二电路块的电源电位。 然后，当第一电路块从电源关闭状态转换到电源供给状态或从电源供给状态转换到电源关闭状态时，操作控制电路暂时停止第二电路块的功能，然后恢复 基于从电源电位检测电路输出的检测结果的第二电路块的功能。

公开(公告)号：US07969491B2

公开(公告)日：2011-06-28

申请号：US11898857

申请日：2007-09-17

申请人： Seiichiro Mizuno ,  Hiroo Yamamoto ,  Kazuki Fujita

发明人： Seiichiro Mizuno ,  Hiroo Yamamoto ,  Kazuki Fujita

IPC分类号： H04N3/14

CPC分类号： G01J1/46

摘要： An amount of charges consonant with the intensity of the light entering photodiodes is generated, and the level of the charges is determined by a charge level determination circuit. Based on this determined charge level, a capacitance setting circuit sets a capacitance of an integrating capacitor unit in an integrating circuit. Thereafter, in the integrating circuit, the charges generated by the photodiodes are integrated in the integrating capacitor unit, and a voltage having a value consonant with the amount of the integrated charges is output. When background light is strong and the overall intensity of incident light is high, a comparatively large capacitance is set for the variable capacitor unit of the integrating circuit, and the intensity of the incident light is detected without saturation. When background light is weak and the overall intensity of incident light is low, a comparatively small capacitance is set for the variable capacitor unit of the integrating circuit, and the intensity of the incident light is detected at high sensitivity, regardless of the surrounding conditions.

摘要翻译： 产生与进入光电二极管的光的强度相关的电荷量，并且电荷的电平由电荷水平确定电路确定。 基于该确定的充电电平，电容设定电路将积分电容器单元的电容设定在积分电路中。 此后，在积分电路中，由光电二极管产生的电荷积分在积分电容器单元中，并且输出具有与积分电荷量相关的值的电压。 当背景光强且入射光的总强度高时，对于积分电路的可变电容器单元设置较大的电容，并且不饱和地检测入射光的强度。 当背景光弱并且入射光的总强度低时，对于积分电路的可变电容器单元设置相对小的电容，并且不管周围条件如何，以高灵敏度检测入射光的强度。

公开(公告)号：US07834798B2

公开(公告)日：2010-11-16

申请号：US12440167

申请日：2007-09-05

申请人： Masaki Mizoguchi ,  Yasuhiro Suzuki ,  Seiichiro Mizuno ,  Hiroo Yamamoto

发明人： Masaki Mizoguchi ,  Yasuhiro Suzuki ,  Seiichiro Mizuno ,  Hiroo Yamamoto

IPC分类号： H03M1/12

CPC分类号： H03M1/0682 ,  H01L27/14609 ,  H03M1/0604 ,  H03M1/468 ,  H04N5/378

摘要： The A/D converting circuit 20 is provided with a differential amplifying portion 21, a first variable capacitance portion 22A, a second variable capacitance portion 22B, a comparing portion 23, a connection controlling portion 24, a first feedback portion 25A and a second feedback portion 25B. Voltage values output as a differential signal from the first output terminal and the second output terminal of the differential amplifying portion 21 are converted to 6-bit digital values by a successive approximation type A/D converting circuit (made up of a first variable capacitance portion 22A, a second variable capacitance portion 22B, a comparing portion 23 and a connection controlling portion 24) and output. A difference in potential between the first common point P1 and the second common point P2 is fed back to the differential amplifying portion 21 by the first feedback portion 25A and the second feedback portion 25B, and again converted to a 6-bit digital value by the successive approximation type A/D converting circuit and output.

摘要翻译： A / D转换电路20具有差分放大部分21，第一可变电容部分22A，第二可变电容部分22B，比较部分23，连接控制部分24，第一反馈部分25A和第二反馈 部分25B。 从差分放大部分21的第一输出端和第二输出端输出的差分信号的电压值通过逐次逼近型A / D转换电路（由第一可变电容部分 22A，第二可变电容部分22B，比较部分23和连接控制部分24）并输出。 第一公共点P1和第二公共点P2之间的电位差通过第一反馈部分25A和第二反馈部分25B被反馈到差分放大部分21，并且由第一反馈部分25A和第二反馈部分25B再次转换成6位数字值 逐次逼近型A / D转换电路和输出。

公开(公告)号：US20100194621A1

公开(公告)日：2010-08-05

申请号：US12440167

申请日：2007-09-05

申请人： Masaki Mizoguchi ,  Yasuhiro Suzuki ,  Seiichiro Mizuno ,  Hiroo Yamamoto

发明人： Masaki Mizoguchi ,  Yasuhiro Suzuki ,  Seiichiro Mizuno ,  Hiroo Yamamoto

IPC分类号： H03M1/12

CPC分类号： H03M1/0682 ,  H01L27/14609 ,  H03M1/0604 ,  H03M1/468 ,  H04N5/378

摘要： The A/D converting circuit 20 is provided with a differential amplifying portion 21, a first variable capacitance portion 22A, a second variable capacitance portion 22B, a comparing portion 23, a connection controlling portion 24, a first feedback portion 25A and a second feedback portion 25B. Voltage values output as a differential signal from the first output terminal and the second output terminal of the differential amplifying portion 21 are converted to 6-bit digital values by a successive approximation type A/D converting circuit (made up of a first variable capacitance portion 22A, a second variable capacitance portion 22B, a comparing portion 23 and a connection controlling portion 24) and output. A difference in potential between the first common point P1 and the second common point P2 is fed back to the differential amplifying portion 21 by the first feedback portion 25A and the second feedback portion 25B, and again converted to a 6-bit digital value by the successive approximation type A/D converting circuit and output.

摘要翻译： A / D转换电路20具有差分放大部分21，第一可变电容部分22A，第二可变电容部分22B，比较部分23，连接控制部分24，第一反馈部分25A和第二反馈 部分25B。 从差分放大部分21的第一输出端和第二输出端输出的差分信号的电压值通过逐次逼近型A / D转换电路（由第一可变电容部分 22A，第二可变电容部分22B，比较部分23和连接控制部分24）并输出。 第一公共点P1和第二公共点P2之间的电位差通过第一反馈部分25A和第二反馈部分25B被反馈到差分放大部分21，并且由第一反馈部分25A和第二反馈部分25B再次转换成6位数字值 逐次逼近型A / D转换电路和输出。

公开(公告)号：US20050258887A1

公开(公告)日：2005-11-24

申请号：US11191009

申请日：2005-07-28

申请人： Miwa Ito ,  Kazuyuki Nakanishi ,  Akio Hirata ,  Hiroo Yamamoto ,  Tsuguyasu Hatsuda

发明人： Miwa Ito ,  Kazuyuki Nakanishi ,  Akio Hirata ,  Hiroo Yamamoto ,  Tsuguyasu Hatsuda

IPC分类号： H03K19/0185 ,  H03K3/011 ,  H03K3/356 ,  H03K5/153 ,  H03L5/00

CPC分类号： H03K3/356113 ,  H03K3/011

摘要： In a level shifter, in the case where the amplitude voltage of an input signal (i.e., a first power voltage VDDL) input to an input terminal is changed to be higher and the amplitude voltage of an output signal (i.e., a second power voltage VDDH) output from an output terminal is changed to be lower, a fall delay time of the signal output from the output terminal tends to be longer than a rise delay time of the signal. However, an inverted input signal obtained by an inverter is input to a level shifting unit and also to the gate of an N-type transistor, and therefore, the N-type transistor is turned on at the fall of the input signal input to the input terminal, so as to supply a current based on the second power voltage VDDH to an output node of the level shifting unit for assisting the shift into H level performed in the level shifting unit. Accordingly, even when at least one of the amplitude voltage of the input signal and the amplitude voltage of the output signal is changed, balance between the fall delay time characteristic and the rise delay time characteristic of the output signal can be satisfactorily kept.

摘要翻译： 在电平移位器中，输入到输入端子的输入信号（即，第一电源电压VDDL）的振幅电压变化为较高，输出信号的振幅电压（即，第二电源电压 从输出端子输出的VDDH）变低，从输出端子输出的信号的下降延迟时间趋于长于信号的上升延迟时间。 然而，由逆变器获得的反相输入信号被输入到电平移位单元，并输入到N型晶体管的栅极，因此，在输入信号的输入信号的下降时，N型晶体管导通 输入端子，以便将基于第二电源电压VDDH的电流提供给电平移位单元的输出节点，用于辅助在电平转换单元中执行的向H电平的移位。 因此，即使当输入信号的振幅电压和输出信号的振幅电压中的至少一个改变时，也能够令人满意地保持输出信号的下降延迟时间特性和上升延迟时间特性之间的平衡。

公开(公告)号：US6150800A

公开(公告)日：2000-11-21

申请号：US395971

申请日：1999-09-15

申请人： Masayoshi Kinoshita ,  Shiro Sakiyama ,  Jun Kajiwara ,  Katsuji Satomi ,  Hiroo Yamamoto ,  Katsuhiro Ootani

发明人： Masayoshi Kinoshita ,  Shiro Sakiyama ,  Jun Kajiwara ,  Katsuji Satomi ,  Hiroo Yamamoto ,  Katsuhiro Ootani

IPC分类号： G05F1/56 ,  G05F1/573 ,  G05F1/575 ,  H02H9/02 ,  G05F1/40

CPC分类号： G05F1/573 ,  G05F1/575 ,  Y10S323/908

摘要： A power circuit including means for preventing the generation of an inrush current during the power circuit's initial operation without increasing the size of the power circuit is described. The power circuit comprises an output transistor for supplying a current from a power supply to an output terminal, and a differential amplifier for controlling the current supplied by the output transistor in such a manner as to regulate a voltage at the output terminal based on a preset reference voltage. A limiting transistor is provided as a source follower on a current path at the output stage of the differential amplifier. The gate potential of the output transistor is controlled using the source potential of the limiting transistor. Before the power circuit starts to operate, an operation controller charges a capacitor to control the gate potential of the limiting transistor so that during the initial operation of the power circuit, the capacitor is discharged by using a current source. Accordingly, during the initial operation of the power circuit, the gate potential of the limiting transistor gradually decreases while the gate-source voltage of the output transistor gradually increases. As a result, the generation of the inrush current can be suppressed.

摘要翻译： 描述了一种电源电路，其包括用于在电源电路的初始操作期间防止产生浪涌电流的装置，而不增加电源电路的尺寸。 电源电路包括用于从电源向输出端子提供电流的输出晶体管，以及差分放大器，用于根据预设的方式控制由输出晶体管提供的电流，以调节输出端子处的电压 参考电压。 在差分放大器的输出级的电流路径上提供限制晶体管作为源极跟随器。 使用限制晶体管的源极电位来控制输出晶体管的栅极电位。 在电源电路开始工作之前，操作控制器对电容器充电以控制限流晶体管的栅极电位，使得在电源电路的初始操作期间，通过使用电流源来放电电容器。 因此，在电源电路的初始动作期间，限制晶体管的栅极电位逐渐降低，同时输出晶体管的栅极 - 源极电压逐渐增大。 结果，可以抑制浪涌电流的产生。

公开(公告)号：US20120018621A1

公开(公告)日：2012-01-26

申请号：US13147244

申请日：2010-01-29

申请人： Seiichiro Mizuno ,  Hiroo Yamamoto ,  Makoto Kobayashi

发明人： Seiichiro Mizuno ,  Hiroo Yamamoto ,  Makoto Kobayashi

IPC分类号： H03F3/08

CPC分类号： H01L27/0225 ,  G01J1/46 ,  H01L27/14609 ,  H04N5/32 ,  H04N5/355 ,  H04N5/378

摘要： In a signal processing device of an embodiment, an integration circuit accumulates a charge from a photodiode in an integrating capacitor element, and outputs a voltage value according to the amount of charge. A comparator circuit, when the voltage value from the integration circuit has reached a reference value, outputs a saturation signal. A charge injection circuit, in response to the saturation signal, injects an opposite polarity of charge into the integrating capacitor element. A counter circuit performs counting based on the saturation signal. A holding circuit holds the voltage value from the integration circuit. An amplifier circuit outputs a voltage value that is K times (where K>1) larger than the voltage value held by the holding circuit. An A/D converter circuit sets a voltage value that is K times larger than the reference value as the maximum input voltage value, that is, a full-scale value, and outputs a digital value corresponding to the voltage value from the amplifier circuit.

摘要翻译： 在实施例的信号处理装置中，积分电路从积分电容器元件中的光电二极管蓄积电荷，并输出与电荷量相对应的电压值。 比较电路当积分电路的电压值达到基准值时，输出饱和信号。 电荷注入电路响应于饱和信号，向积分电容器元件注入相反的电荷极性。 计数器电路根据饱和信号进行计数。 保持电路保持来自积分电路的电压值。 放大电路输出比保持电路保持的电压值大K倍（K> 1）的电压值。 A / D转换器电路将比参考值大K倍的电压值设置为最大输入电压值，即满量程值，并输出与放大器电路的电压值对应的数字值。