摘要:
A power supply potential detecting circuit detects a power supply potential of a second circuit block when a first circuit block shifts from a power supply shutdown state to a power supply feeding state or shifts from the power supply feeding state to the power supply shutdown state. Then, an operation control circuit temporarily stops a function of the second circuit block when the first circuit block shifts from the power supply shutdown state to the power supply feeding state or shifts from the power supply feeding state to the power supply shutdown state and then recovers the function of the second circuit block based on a detection result outputted from the power supply potential detecting circuit.
摘要:
A power supply potential detecting circuit detects a power supply potential of a second circuit block when a first circuit block shifts from a power supply shutdown state to a power supply feeding state or shifts from the power supply feeding state to the power supply shutdown state. Then, an operation control circuit temporarily stops a function of the second circuit block when the first circuit block shifts from the power supply shutdown state to the power supply feeding state or shifts from the power supply feeding state to the power supply shutdown state and then recovers the function of the second circuit block based on a detection result outputted from the power supply potential detecting circuit.
摘要:
An amount of charges consonant with the intensity of the light entering photodiodes is generated, and the level of the charges is determined by a charge level determination circuit. Based on this determined charge level, a capacitance setting circuit sets a capacitance of an integrating capacitor unit in an integrating circuit. Thereafter, in the integrating circuit, the charges generated by the photodiodes are integrated in the integrating capacitor unit, and a voltage having a value consonant with the amount of the integrated charges is output. When background light is strong and the overall intensity of incident light is high, a comparatively large capacitance is set for the variable capacitor unit of the integrating circuit, and the intensity of the incident light is detected without saturation. When background light is weak and the overall intensity of incident light is low, a comparatively small capacitance is set for the variable capacitor unit of the integrating circuit, and the intensity of the incident light is detected at high sensitivity, regardless of the surrounding conditions.
摘要:
In the solid-state imaging apparatus of the present invention, when a signal is output from the capacity element to the data signal output circuit, the voltage of the output terminal of the capacity element is kept at that attained when the switch was previously opened, namely, the initial voltage of the input terminal of the data signal output circuit, whereby the voltage of the input terminal of the data signal output circuit is stable without fluctuation. Therefore, no noise is generated in the output signal at the instant when the capacity element and data signal output circuit are short-circuited, whereby optical images can be captured with a high accuracy in a high speed.
摘要:
In a signal processing device of an embodiment, an integration circuit accumulates a charge from a photodiode in an integrating capacitor element, and outputs a voltage value according to the amount of charge. A comparator circuit, when the voltage value from the integration circuit has reached a reference value, outputs a saturation signal. A charge injection circuit, in response to the saturation signal, injects an opposite polarity of charge into the integrating capacitor element. A counter circuit performs counting based on the saturation signal. A holding circuit holds the voltage value from the integration circuit. An amplifier circuit outputs a voltage value that is K times (where K>1) larger than the voltage value held by the holding circuit. An A/D converter circuit sets a voltage value that is K times larger than the reference value as the maximum input voltage value, that is, a full-scale value, and outputs a digital value corresponding to the voltage value from the amplifier circuit.
摘要翻译:在实施例的信号处理装置中,积分电路从积分电容器元件中的光电二极管蓄积电荷,并输出与电荷量相对应的电压值。 比较电路当积分电路的电压值达到基准值时,输出饱和信号。 电荷注入电路响应于饱和信号,向积分电容器元件注入相反的电荷极性。 计数器电路根据饱和信号进行计数。 保持电路保持来自积分电路的电压值。 放大电路输出比保持电路保持的电压值大K倍(K> 1)的电压值。 A / D转换器电路将比参考值大K倍的电压值设置为最大输入电压值,即满量程值,并输出与放大器电路的电压值对应的数字值。
摘要:
A photodetecting device 1 includes a photodiode PDm,n, a switch SWm,n for the photodiode, an integrating circuit 12m, and a noise removing circuit 13m. The integrating circuit 12m accumulates in a capacitor Cfk an electric charge input from the photodiode PDm,n through the switch SWm,n for the photodiode, and outputs a voltage value according to the amount of the accumulated electric charge. The noise removing circuit 13m includes an amplifier A3, five switches SW31 to SW35, four capacitors C31 to C34, and a power supply V3. The noise removing circuit 13m takes in a voltage value that is output from the integrating circuit 12m at a time where the switch SW31 is first turned from a closed state to an open state, and after the time, outputs a voltage value according to a difference between the voltage value that is output from the integrating circuit 12m and the voltage value previously taken in.
摘要:
It is an object of the present invention to achieve a semiconductor device capable of preventing circuit malfunctions caused by noise without decreasing an integration degree of the circuit by making a space between signal interconnections wider and inserting a shield or a shield layer between the signal interconnections. The semiconductor device has a multilayer interconnection structure wherein three or more interconnection layers are stacked on a silicon semiconductor substrate, and comprises: a first signal line which is formed with a (N−1)-th interconnection layer and comprises a latch circuit; a second signal line which is formed with a (N+1)-th interconnection layer and is arranged so as to cross the first signal line or partially overlap thereover; and a power supply interconnection serving as a shield interconnection which is formed with an N-th interconnection layer in a portion directly beneath the first signal line and the second signal line.
摘要:
In a signal read circuit including a plurality of circuit rows each having a charge amplifier connected to a photoelectric conversion element PD and a CDS circuit 2S for performing correlated double sampling for an output from the charge amplifier, a dummy circuit row DMY having the same configuration as a circuit row SLT is connected in parallel with this circuit row SLT. By calculating the difference between these circuit rows connected in parallel, offset variations generated in the two circuit rows SLT and DMY can be removed.
摘要:
A cell library database includes function information of standard cells which are basic circuits forming a logical device, each of the standard cell comprising at least one of power supply terminal as logical terminals, the function information of the standard cell containing logical information or delay information of the power supply terminal relative to an output terminal, or function information of macro cells which are functional circuits forming a logical device, each of the macro cell comprising at least one of power supply terminals as logical terminals, the function information of the macro cell containing logical information or delay information of said power supply terminals relative to an output terminal. A design aiding system uses the cell library database to execute logical simulation, etc.
摘要:
A photodetecting device 1 includes a photodiode PDm,n, a switch SWm,n for the photodiode, an integrating circuit 12m, and a noise removing circuit 13m. The integrating circuit 12m accumulates in a capacitor Cfk an electric charge input from the photodiode PDm,n through the switch SWm,n for the photodiode, and outputs a voltage value according to the amount of the accumulated electric charge. The noise removing circuit 13m includes an amplifier A3, five switches SW31 to SW35, four capacitors C31 to C34, and a power supply V3. The noise removing circuit 13m takes in a voltage value that is output from the integrating circuit 12m at a time where the switch SW31 is first turned from a closed state to an open state, and after the time, outputs a voltage value according to a difference between the voltage value that is output from the integrating circuit 12m and the voltage value previously taken in.