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公开(公告)号：US20230195572A1
公开(公告)日：2023-06-22
申请号：US18167992
申请日：2023-02-13
Applicant: Micron Technology, Inc.
Inventor： Tyler L. Betz , Andrew M. Kowles , Adam J. Hieb
CPC classification number: G06F11/1068 , G06F3/0619 , G06F3/0644 , G06F3/0653 , G06F3/0679 , G06F11/076 , G06F11/0772
Abstract: Disclosed is a system including a memory device having a plurality of physical memory segments and a processing device to perform operations that include, responsive to detecting a failure of a memory operation associated with a physical memory segment of the plurality of physical memory segments, quarantining the physical memory segment, responsive to quarantining the physical memory segment, performing one or more scanning operations on the physical memory segment, and determining, based on results of the one or more scanning operations, a viability status of the physical memory segment, wherein the viability status indicates an ability of the physical memory segment to store data.
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公开(公告)号：US11500548B2
公开(公告)日：2022-11-15
申请号：US17192358
申请日：2021-03-04
Applicant: Micron Technology, Inc.
Inventor： Adam J. Hieb , Robert W. Strong
IPC: G06F3/06
Abstract: A system includes a memory component and a processing device, operatively coupled with the memory component, to generate a physical presence security identification (PSID) for the memory component using a statistically random number generator. The processing device, operatively coupled with the memory component, can securely retrieve the PSID and revert the memory component to an original state using the PSID.
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公开(公告)号：US11449266B2
公开(公告)日：2022-09-20
申请号：US17004135
申请日：2020-08-27
Applicant: Micron Technology, Inc.
Inventor： Adam J. Hieb , Adam C. Guy , Sanjay Tiwari , Todd A. Marquart
Abstract: A system includes a memory device and a processing device coupled to the memory device. The memory processing device can perform operations including receiving data indicative of occurrence of a plurality of events. The processing device can perform operations including determining an event log type for each of the plurality of events. The processing device can perform operations including storing an identifier associated with each of the determined event log types. The processing device can perform operations including updating a counter value associated with each identifier in response to occurrence of an event associated with the respective identifier.
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公开(公告)号：US20220066868A1
公开(公告)日：2022-03-03
申请号：US16947975
申请日：2020-08-26
Applicant: Micron Technology Inc.
Inventor： Tyler L. Betz , Andrew M. Kowles , Adam J. Hieb
Abstract: Disclosed is a system including a memory device having a plurality of physical memory segments and a processing device to perform operations that include, responsive to detecting a failure of a memory operation associated with a physical memory segment of the plurality of physical memory segments, quarantining the physical memory segment, responsive to quarantining the physical memory segment, performing one or more scanning operations on the physical memory segment, and determining, based on results of the one or more scanning operations, a viability status of the physical memory segment, wherein the viability status indicates an ability of the physical memory segment to store data.
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公开(公告)号：US20210065840A1
公开(公告)日：2021-03-04
申请号：US17091252
申请日：2020-11-06
Applicant: Micron Technology, Inc.
Inventor： Adam J. Hieb
IPC: G11C29/00 , G06F3/06 , G11C11/4093 , G06F13/16
Abstract: A determination is made by a processing device included in a memory component that an operation to program data to a location in the memory component has failed, the data is programmed to a different location in the memory component by the processing device upon determining the operation has failed, and a notification that the data has been programmed to the different location in the memory component is provided by the processing device to a processing device operatively coupled to the memory component.
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Patent Agency Ranking
公开(公告)号：US12073094B2
公开(公告)日：2024-08-27
申请号：US17973034
申请日：2022-10-25
Applicant: Micron Technology, Inc.
Inventor： Adam J. Hieb , Robert W. Strong
IPC: G06F3/06
CPC classification number: G06F3/062 , G06F3/0655 , G06F3/0679
Abstract: A system includes a memory component and a processing device, operatively coupled with the memory component, to generate a physical presence security identification (PSID) for the memory component using a statistically random number generator. The processing device, operatively coupled with the memory component, can securely retrieve the PSID and revert the memory component to an original state using the PSID.
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公开(公告)号：US12019567B2
公开(公告)日：2024-06-25
申请号：US17524814
申请日：2021-11-12
Applicant: Micron Technology, Inc.
Inventor： Adam J. Hieb
IPC: G06F13/38 , G06F1/10 , G06F9/4401 , G06F13/16 , G06F13/42
CPC classification number: G06F13/1668 , G06F1/10 , G06F13/4291 , G06F2213/0026
Abstract: A method includes enabling a manufacturing mode at least partially based on a first signal provided via one of a number of reserved pins of an interface connector. The method can further include providing, in response to enabling the manufacturing mode, a second signal to a memory component coupled to the interface connector via a number of other pins of the interface connector.
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公开(公告)号：US11705216B2
公开(公告)日：2023-07-18
申请号：US17504778
申请日：2021-10-19
Applicant: Micron Technology, Inc.
Inventor： Adam J. Hieb
IPC: G11C11/16 , G11C29/00 , G11C11/4093 , G06F13/16 , G06F3/06
CPC classification number: G11C29/848 , G06F3/0619 , G06F3/0646 , G06F3/0679 , G06F13/1673 , G11C11/4093
Abstract: A determination is made by a processing device included in a memory component that an operation to program data to a location in the memory component has failed, the data is programmed to a different location in the memory component by the processing device upon determining the operation has failed, and a notification that the data has been programmed to the different location in the memory component is provided by the processing device to a processing device operatively coupled to the memory component.
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公开(公告)号：US20230017942A1
公开(公告)日：2023-01-19
申请号：US17946885
申请日：2022-09-16
Applicant: Micron Technology, Inc.
Inventor： Adam J. Hieb , Adam C. Guy , Sanjay Tiwari , Todd A. Marquart
Abstract: A system includes a memory device and a processing device coupled to the memory device. The memory processing device can perform operations including receiving data indicative of occurrence of a plurality of events. The processing device can perform operations including determining an event log type for each of the plurality of events. The processing device can perform operations including storing an identifier associated with each of the determined event log types. The processing device can perform operations including updating a counter value associated with each identifier in response to occurrence of an event associated with the respective identifier.
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公开(公告)号：US11443811B2
公开(公告)日：2022-09-13
申请号：US17074758
申请日：2020-10-20
Applicant: Micron Technology, Inc.
Inventor： Kevin R. Brandt , Adam J. Hieb , Jonathan Tanguy , Preston A. Thomson
Abstract: A data erase operation is performed on the memory system. The directed data erase operation performed on the memory system erases blocks of the memory device including blocks that are indicated as not including user data. In some embodiments, a data erase operation may be performed on a memory system to erase those groups of memory cells (e.g., blocks) indicated as not including user data. In some embodiments, a data erase operation may be performed on a memory system to erase those groups of memory cells (e.g., blocks) indicated as valid without erasing those groups of memory cells (e.g., blocks) indicated as invalid. In some embodiments, a data erase operation that can be performed on a memory system may obtain information associated with failing scenes of groups of memory cells (e.g., blocks) prior to obtaining the information, and erase the blocks (e.g., invalid blocks) subsequently.
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