公开(公告)号：US11776615B2

公开(公告)日：2023-10-03

申请号：US17673302

申请日：2022-02-16

Applicant: Micron Technology, Inc.

Inventor： Tomoko Ogura Iwasaki ,  Tracy D. Evans ,  Avani F. Trivedi ,  Aparna U. Limaye ,  Jianmin Huang

IPC: G11C11/408 ,  G06F12/02 ,  G11C11/4074

CPC classification number: G11C11/4087 ,  G06F12/0246 ,  G11C11/4074 ,  G11C11/4085 ,  G06F2212/7201

Abstract: Systems and methods for read operations and management are disclosed. More specifically, this disclosure is directed to receiving a first read command directed to a first logical address and receiving, after the first read command, a second read command directed to a second logic address. The method also includes receiving, after the second read command, a third read command directed to a third logical address and determining that the first logical address and the third logical address correspond to a first physical address and a third physical address, respectively. The first physical address and the third physical address can be associated with a first word line of a memory component while the second logical address corresponds to a second physical address associated with a second word line of the memory component. The method includes executing the first read command and the third read command sequentially.

公开(公告)号：US11456284B2

公开(公告)日：2022-09-27

申请号：US16939678

申请日：2020-07-27

Applicant: Micron Technology, Inc.

Inventor： Randon K. Richards ,  Aparna U. Limaye ,  Owen R. Fay ,  Dong Soon Lim

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L23/552 ,  H01L23/64 ,  H01L21/78 ,  H01L21/66 ,  H01L25/00 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/48

Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate and the components are connected with conductive material in preformed holes in dielectric material in the bond lines aligned with TSVs of the devices and the exposed conductors of the substrate. Methods of fabrication are also disclosed.

公开(公告)号：US11281392B2

公开(公告)日：2022-03-22

申请号：US16995345

申请日：2020-08-17

Applicant: Micron Technology, Inc.

Inventor： Jianmin Huang ,  Aparna U. Limaye ,  Avani F. Trivedi ,  Tomoko Ogura Iwasaki ,  Tracy D. Evans

IPC: G06F3/06 ,  G06F12/10 ,  G11C16/34 ,  G11C16/24 ,  G11C16/04

Abstract: Systems, apparatuses, and methods related to media management, including “garbage collection,” in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a criticality value can be determined and used as a basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a criticality value associated with performing a garbage collection operation satisfies a condition. Based on determining that the condition is satisfied, a parameter associated with performing the garbage collection operation can be adjusted. The garbage collection operation is performed on the data block stored on the memory component using the adjusted parameter.

公开(公告)号：US20210118851A1

公开(公告)日：2021-04-22

申请号：US16939720

申请日：2020-07-27

Applicant: Micron Technology, Inc.

Inventor： Randon K. Richards ,  Owen R. Fay ,  Aparna U. Limaye ,  Dong Soon Lim

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L23/552 ,  H01L23/64 ,  H01L21/78 ,  H01L21/66 ,  H01L25/00

Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, at least one surface mount component operably coupled to conductive traces of at least one dielectric material, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate.

公开(公告)号：US10803969B1

公开(公告)日：2020-10-13

申请号：US16553842

申请日：2019-08-28

Applicant: Micron Technology, Inc.

Inventor： Debra M. Bell ,  Shea M. Morrison ,  Aparna U. Limaye ,  Diana C. Majerus ,  Rachael R. Carlson

IPC: G11C11/409 ,  G11C29/02 ,  G06F21/79 ,  G06F12/14

Abstract: Apparatuses and methods related to authenticating memory. Memory devices can be authenticated utilizing authentication codes. An authentication code can be generated based on information stored in a fuse array of the memory device. The authentication code can be compared to an externally provided authentication code to authenticate the memory device. The memory device may be authenticated to ensure that the memory device is not a security threat.

公开(公告)号：US12259257B2

公开(公告)日：2025-03-25

申请号：US17557897

申请日：2021-12-21

Applicant: Micron Technology, Inc.

Inventor： Kathryn H. Russo ,  Aparna U. Limaye ,  Gurtaranjit Kaur

IPC: G01C21/00 ,  G01C21/32 ,  G06N20/00 ,  H04W4/44

Abstract: Methods and apparatuses associated with updating a map using images are described. An apparatus can include a processing resource and a memory resource having instructions executable to a processing resource to monitor a map including a plurality of locations, receive, at the processing resource, the memory resource, or both, and from a first source, image data associated with a first location, identify the image data as being associated with a missing portion, an outdated portion, or both, of the map, and update the missing portion, the outdated portion, or both, of the map with the image data.

公开(公告)号：US20240272703A1

公开(公告)日：2024-08-15

申请号：US18438912

申请日：2024-02-12

Applicant: Micron Technology, Inc.

Inventor： Priya Vemparala Guruswamy ,  Barbara J. Bailey ,  Marsela Pontoh ,  Aparna U. Limaye ,  Tejas Jagadeesh

IPC: G06F3/01 ,  G01N33/00 ,  G06V10/10

CPC classification number: G06F3/011 ,  G01N33/0034 ,  G06V10/10

Abstract: Methods, apparatuses, and systems associated with a smart nose with machine learning are described. A system can include a smart nose device configured to receive an odor and create a first odor vector associated with the odor. The system can include an image detection device configured to receive a plurality of images while the odor is received and identify a plurality of objects within the plurality of images. The system can also include a computing device to refine the first odor vector based on the identified plurality of objects, create, utilizing a machine learning model, a second odor vector based on the refined first odor vector and an odor pattern database, and predict the odor based on the second odor vector.

公开(公告)号：US11664057B2

公开(公告)日：2023-05-30

申请号：US17374601

申请日：2021-07-13

Applicant: Micron Technology, Inc.

Inventor： Aparna U. Limaye ,  Timothy Mowry Hollis

IPC: G11C7/10 ,  G11C5/06

CPC classification number: G11C7/1012 ,  G11C5/06 ,  G11C7/109 ,  G11C7/1039 ,  G11C7/1063

Abstract: Apparatus and methods are disclosed, including memory devices and systems. Example memory devices, systems and methods include a buffer to translate high speed data interactions on a host interface side into slower, wider data interactions on a DRAM interface side. Example memory devices, systems and methods include a multiplexer circuit to further facilitate use of slower, and wider bandwidth memory devices. Devices and methods described may be configured to substantially match the capacity of a narrower, higher speed host interface.

公开(公告)号：US11362070B2

公开(公告)日：2022-06-14

申请号：US16939650

申请日：2020-07-27

Applicant: Micron Technology, Inc.

Inventor： Aparna U. Limaye ,  Dong Soon Lim ,  Randon K. Richards ,  Owen R. Fay

IPC: H01L23/552 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L23/64 ,  H01L21/78 ,  H01L21/66 ,  H01L25/00 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/48

Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more stacks of microelectronic devices are located on the substrate, and microelectronic devices of the stacks are connected to vertical conductive paths external to the stacks and extending to the substrate and to lateral conductive paths extending between the stacks. Methods of fabrication are also disclosed.

公开(公告)号：US20220171562A1

公开(公告)日：2022-06-02

申请号：US17673408

申请日：2022-02-16

Applicant: Micron Technology, Inc.

Inventor： Jianmin Huang ,  Aparna U. Limaye ,  Avani F. Trivedi ,  Tomoko Ogura Iwasaki ,  Tracy D. Evans

IPC: G06F3/06 ,  G06F12/10 ,  G11C16/34 ,  G11C16/24

Abstract: Systems, apparatuses, and methods related to media management, including “garbage collection,” in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a criticality value can be determined and used as a basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a criticality value associated with performing a garbage collection operation satisfies a condition. Based on determining that the condition is satisfied, a parameter associated with performing the garbage collection operation can be adjusted. The garbage collection operation is performed on the data block stored on the memory component using the adjusted parameter.