公开(公告)号：US09929064B2

公开(公告)日：2018-03-27

申请号：US14877360

申请日：2015-10-07

Applicant: Micron Technology, Inc.

Inventor： Venkatraghavan Bringivijayaraghavan ,  Jason M. Brown

IPC: H01L21/66 ,  G01R31/3185 ,  H01L23/48 ,  G01R31/317

CPC classification number: H01L22/22 ,  G01R31/31717 ,  G01R31/318513 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Various embodiments comprise apparatuses and methods for testing and repairing through-substrate vias in a stack of interconnected dice. In various embodiments, an apparatus is provided that includes a number of through-substrate vias to couple to one or more devices, at least one redundant through-substrate via to allow a repair of the apparatus, and a pair of pull-up devices coupled to the through-substrate vias and the redundant through-substrate via to provide a high-data value to the first end of the respective through-substrate vias. A test register is coupled the second end of each of the through-substrate vias and the redundant through-substrate via to store a received version of the high-data value. A comparator compares the high-data value with the received version of the high-data value to test the through-substrate vias for short-circuit connections. Other apparatuses and methods are disclosed.

公开(公告)号：US12176031B2

公开(公告)日：2024-12-24

申请号：US17723673

申请日：2022-04-19

Applicant: Micron Technology, Inc.

Inventor： Vijayakrishna J. Vankayala ,  Hari Giduturi ,  Jason M. Brown

IPC: G11C11/16 ,  G11C13/00 ,  H01L25/065

Abstract: A memory device includes a substrate with two or more memory die stacked in a three-dimensional stacked (3DS) configuration. The memory device includes a clock input configured to receive a clock from a host device. The memory device also includes a command input configured to receive command and address bits from the host device. The two or more memory die each include its own plurality of memory cells. Furthermore, each of the two or more memory die include a local control circuitry configured to receive or transmit a divided clock that is based on the clock.

公开(公告)号：US11955158B2

公开(公告)日：2024-04-09

申请号：US18064773

申请日：2022-12-12

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jason M. Brown ,  Daniel B. Penney

IPC: G11C11/40 ,  G06F11/30 ,  G11C7/10 ,  G11C11/406 ,  G11C11/4076 ,  G11C16/34 ,  G11C7/00

CPC classification number: G11C11/40611 ,  G06F11/3037 ,  G11C7/1039 ,  G11C11/4076 ,  G11C16/3431 ,  G11C16/349 ,  G06F2201/88 ,  G11C7/00 ,  G11C2211/406

Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for scheduling targeted refreshes in a memory device. Memory cells in a memory device may be volatile and may need to be periodically refreshed as part of an auto-refresh operation. In addition, certain rows may experience faster degradation, and may need to undergo targeted refresh operations, where a specific targeted refresh address is provided and refreshed. The rate at which targeted refresh operations need to occur may be based on the rate at which memory cells are accessed. The memory device may monitor accesses to a bank of the memory, and may use a count of the accesses to determine if an auto-refresh address or a targeted refresh address will be refreshed.

公开(公告)号：US11217295B2

公开(公告)日：2022-01-04

申请号：US16600355

申请日：2019-10-11

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Kallol Mazumder ,  Jason M. Brown ,  Derek R. May ,  Jeffrey E. Koelling ,  Roger D. Norwood

IPC: G11C11/406 ,  G11C11/408 ,  G06F11/34

Abstract: Apparatuses and methods for address detection are disclosed herein. An example apparatus it an address filter and an address tracking circuit. The address filter may be configured to receive a first address and to determine whether the first address matches an address of a plurality of addresses associated with the address filter. The address tracking circuit may be coupled to the address filter and configured to store the first address responsive to a determination that the first address matches an address of the plurality of addresses associated with the address filter. The address tracking circuit may further be configured to receive a second address and to change a count associated with the first address based on the second address matching the first address. The address tracking circuit may be configured to selectively provide the first address responsive to the count.

公开(公告)号：US20210398592A1

公开(公告)日：2021-12-23

申请号：US17446710

申请日：2021-09-01

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Daniel B. Penney ,  Jason M. Brown

IPC: G11C15/04

Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for determining extremum numerical values. Numerical values may be stored in files of a stack, with each bit of the numerical value stored in a content addressable memory (CAM) cell of the file. Each file may be associated with an accumulator circuit, which provides an accumulator signal. An extremum search operation may be performed where a sequence of comparison bits are compared in a bit-by-bit fashion to each bit of the numerical values. The accumulator circuits each provide an accumulator signal which indicates if the numerical value in the associated file is an extremum value or not. Examples of extremum search operations include finding a maximum of the numerical values and a minimum of the numerical values.

公开(公告)号：US11158373B2

公开(公告)日：2021-10-26

申请号：US16437811

申请日：2019-06-11

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Daniel B. Penney ,  Jason M. Brown

IPC: G11C15/04

Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for determining extremum numerical values. Numerical values may be stored in files of a stack, with each bit of the numerical value stored in a content addressable memory (CAM) cell of the file. Each file may be associated with an accumulator circuit, which provides an accumulator signal. An extremum search operation may be performed where a sequence of comparison bits are compared in a bit-by-bit fashion to each bit of the numerical values. The accumulator circuits each provide an accumulator signal which indicates if the numerical value in the associated file is an extremum value or not. Examples of extremum search operations include finding a maximum of the numerical values and a minimum of the numerical values.

公开(公告)号：US11024349B2

公开(公告)日：2021-06-01

申请号：US16401057

申请日：2019-05-01

Applicant: Micron Technology, Inc.

Inventor： Jason M. Brown ,  Vijayakrishna J. Vankayala ,  Todd A. Dauenbaugh

IPC: G11C7/22

Abstract: A memory device includes a first data driver configured to send a first data according to a first clock signal; a first data port electrically coupled to the first data driver, the first data port configured to receive the first data; a second data driver configured to send a second data according to a second clock signal, wherein the second clock signal does not match the first clock signal; and a second data port electrically coupled to the second data driver, the second data port configured to receive the second data.

公开(公告)号：US20210005240A1

公开(公告)日：2021-01-07

申请号：US16459520

申请日：2019-07-01

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jason M. Brown ,  Daniel B. Penney

IPC: G11C11/406 ,  G11C11/408

Abstract: An apparatus may include multiple memory devices. Each memory device may include multiple memory banks. Addresses of accessed word lines for a particular portion of memory and the number of times those word lines are accessed may be tracked by each memory device. When a memory device determines that an accessed word line is an aggressor word line, the memory device alerts other memory devices of the apparatus. The memory devices may then perform targeted refresh operations on victim word lines of the aggressor word line.

公开(公告)号：US20200381040A1

公开(公告)日：2020-12-03

申请号：US16428625

申请日：2019-05-31

Applicant: Micron Technology, Inc.

Inventor： Daniel B. Penney ,  Jason M. Brown ,  Nathaniel J. Meier ,  Timothy B. Cowles ,  Jiyun Li

IPC: G11C11/406 ,  G11C11/408

Abstract: The address of victim rows may be determined based on rows that are accessed in a memory. The victim addresses may be stored and associated with a count for every time a victim row is “victimized.” When the count for a victim row reaches a threshold, the victim row may be refreshed to preserve data stored in the row. After the victim row has been refreshed, the count may be reset. When a victim row is accessed, the count may also be reset. The counts may be adjusted for closer victim rows (e.g., +/−1) at a faster rate than counts for more distant victim rows (e.g., +/−2). This may cause closer victim rows to be refreshed at a higher rate than more distant victim rows.

公开(公告)号：US10832792B1

公开(公告)日：2020-11-10

申请号：US16459507

申请日：2019-07-01

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Daniel B. Penney ,  Jason M. Brown

IPC: G11C7/00 ,  G11C29/00 ,  G11C11/408 ,  G11C11/406

Abstract: Addresses of accessed word lines are stored. Data related to victim word lines associated with the accessed word line are also stored. The victim word lines may have data stored in relation to multiple accessed word lines. The data related to the victim word lines is adjusted when the victim word line is refreshed during a targeted refresh operation or an auto-refresh operation. The data related to the victim word lines is adjusted when the victim word line is accessed during a memory access operation.