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    Data relocation in memory
    11.
    发明授权
    Data relocation in memory 有权

    公开(公告)号：US11983403B2

    公开(公告)日：2024-05-14

    申请号：US17061991

    申请日：2020-10-02

    Applicant: Micron Technology, Inc.

    Inventor： Neal A. Galbo

    IPC: G06F3/06

    CPC classification number: G06F3/0604 ,  G06F3/0646 ,  G06F3/0673

    Abstract: The present disclosure includes apparatuses, methods, and systems for data relocation in memory. An embodiment includes a controller, and a memory having a plurality of physical units of memory cells. Each of the physical units has a different sequential physical address associated therewith, a first number of the physical units have data stored therein, a second number of the physical units do not have data stored therein, and the physical address associated with each respective one of the second number of physical units is a different consecutive physical address in the sequence. The controller can relocate the data stored in the physical unit of the first number of physical units, whose physical address in the sequence is immediately before the first of the consecutive physical addresses associated with the second number of physical units, to the last of the consecutive physical addresses associated with the second number of physical units.

    STATE CHANGE IN SYSTEMS HAVING DEVICES COUPLED IN A CHAINED CONFIGURATION
    13.
    发明申请
    STATE CHANGE IN SYSTEMS HAVING DEVICES COUPLED IN A CHAINED CONFIGURATION 有权
    在具有连接配置中的设备的系统中的状态更改

    公开(公告)号：US20150301746A1

    公开(公告)日：2015-10-22

    申请号：US14755555

    申请日：2015-06-30

    Applicant: Micron Technology, Inc.

    Inventor： William H. Radke ,  Victor Y. Tsai ,  James Cooke ,  Neal A. Galbo ,  Peter Feeley

    IPC: G06F3/06

    CPC classification number: G06F13/102 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/067 ,  G06F13/1684 ,  G06F13/4282 ,  G11C7/1045 ,  G11C7/22 ,  G11C7/222 ,  Y02D10/14 ,  Y02D10/151

    Abstract: The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of embodiments include a host and a number of devices coupled to the host in a chained configuration. The chained configuration includes at least one device that is not directly coupled to the host. The at least one device that is not directly coupled to the host is configured to change from a first communication state to a second communication state responsive to receipt of a command from the host.

    Abstract translation: 本公开包括用于在具有以链式配置耦合的设备的系统中的状态改变的方法，设备和系统。 许多实施例包括以链式配置耦合到主机的主机和多个设备。 链接配置包括至少一个不直接耦合到主机的设备。 不直接耦合到主机的至少一个设备被配置为响应于从主机接收到命令而从第一通信状态改变到第二通信状态。

    Host controller
    15.
    发明授权
    Host controller 有权
    主机控制器

    公开(公告)号：US09043506B2

    公开(公告)日：2015-05-26

    申请号：US14055436

    申请日：2013-10-16

    Applicant: Micron Technology, Inc.

    Inventor： Peter Feeley ,  Robert N. Leibowitz ,  William H. Radke ,  Neal A. Galbo ,  Victor Y. Tsai

    IPC: G06F13/28 ,  G06F13/38

    CPC classification number: G06F3/061 ,  G06F3/0659 ,  G06F3/0685 ,  G06F13/28 ,  G06F13/32 ,  G06F13/385 ,  G06F13/4282

    Abstract: The present disclosure includes methods, devices, and systems for controlling a memory device. One method for controlling a memory device embodiment includes storing device class dependent information and a command in one or more of host system memory and host controller memory, setting a pointer to the command in a register in a host controller, directing access to the one or more of host system memory and host controller memory with the memory device via the host controller; and executing the command with the memory device.

    Abstract translation: 本公开包括用于控制存储器设备的方法，设备和系统。 用于控制存储器件实施例的一种方法包括将设备类相关信息和命令存储在主机系统存储器和主机控制器存储器中的一个或多个中，在主机控制器中的寄存器中设置指向该命令的指针， 通过主机控制器更多的主机系统内存和主机控制器内存与存储设备; 并用存储器件执行命令。

    DATA RELOCATION IN MEMORY
    16.
    发明申请
    DATA RELOCATION IN MEMORY 审中-公开

    公开(公告)号：US20200142589A1

    公开(公告)日：2020-05-07

    申请号：US16177985

    申请日：2018-11-01

    Applicant: Micron Technology, Inc.

    Inventor： Neal A. Galbo

    IPC: G06F3/06

    Abstract: The present disclosure includes apparatuses, methods, and systems for data relocation in memory. An embodiment includes a controller, and a memory having a plurality of physical units of memory cells. Each of the physical units has a different sequential physical address associated therewith, a first number of the physical units have data stored therein, a second number of the physical units do not have data stored therein, and the physical address associated with each respective one of the second number of physical units is a different consecutive physical address in the sequence. The controller can relocate the data stored in the physical unit of the first number of physical units, whose physical address in the sequence is immediately before the first of the consecutive physical addresses associated with the second number of physical units, to the last of the consecutive physical addresses associated with the second number of physical units.

    Command queuing
    17.
    发明授权
    Command queuing 有权

    公开(公告)号：US10146477B2

    公开(公告)日：2018-12-04

    申请号：US15246735

    申请日：2016-08-25

    Applicant: Micron Technology, Inc.

    Inventor： Victor Y. Tsai ,  Danilo Caraccio ,  Daniele Balluchi ,  Neal A. Galbo ,  Robert Warren

    IPC: G06F3/06

    Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.

    Command queuing
    19.
    发明授权
    Command queuing 有权
    命令排队

    公开(公告)号：US09454310B2

    公开(公告)日：2016-09-27

    申请号：US14181089

    申请日：2014-02-14

    Applicant: Micron Technology, Inc.

    Inventor： Victor Y. Tsai ,  Danilo Caraccio ,  Daniele Balluchi ,  Neal A. Galbo ,  Robert Warren

    IPC: G06F3/06

    CPC classification number: G06F3/0659 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0679 ,  G06F3/0688

    Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.

    Abstract translation: 本公开包括用于命令排队的装置和方法。 许多实施例包括从主机在存储器系统处接收排队的命令请求，从存储器系统向主机发送指示存储器系统准备好在存储器系统的命令队列中接收命令的命令响应，以及 响应于发送命令响应，从所述主机接收在所述存储器系统处的所述命令的命令描述符块。

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