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公开(公告)号:US11200001B2
公开(公告)日:2021-12-14
申请号:US16875464
申请日:2020-05-15
Applicant: Micron Technology, Inc.
Inventor: Liang Yu , Jonathan Parry
Abstract: A system to send a first command to a first memory die of a plurality of memory dies of a memory sub-system the first command to execute an initialization process. The system reads a first bit value from the first memory die, the first bit value indicating the first memory die is executing a peak current phase of the initialization process. The system reads a second bit value from the first memory die, the second bit value indicating the first memory die is executing a safe phase of the initialization process. In response to reading the second bit value, a second command is sent to a second memory die to execute the initialization process.
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公开(公告)号:US10795746B2
公开(公告)日:2020-10-06
申请号:US16219292
申请日:2018-12-13
Applicant: Micron Technology, Inc.
Inventor: Jonathan Parry , Nadav Grosz
IPC: G06F11/07 , G06F9/445 , G06F1/3287 , G06F1/3225 , G06F1/3228 , G06F1/3237
Abstract: Apparatus and methods are disclosed, including determining whether firmware has been successfully loaded and whether the firmware version is valid and operable, and if the firmware has not been successfully loaded or the firmware is not valid and operable, tracking a number of unsuccessful attempts to load the firmware or an elapsed time for unsuccessful attempts to load the firmware, and entering a memory device into a reduced-power state if either the number of unsuccessful attempts or the elapsed time has reached a programmable threshold.
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公开(公告)号:US20180129450A1
公开(公告)日:2018-05-10
申请号:US15861374
申请日:2018-01-03
Applicant: Micron Technology, Inc.
Inventor: George Pax , Jonathan Parry
CPC classification number: G06F3/0656 , G06F3/061 , G06F3/0619 , G06F3/0685 , G06F3/0688 , G06F11/1068 , G06F11/1072 , G06F12/0246 , G06F2212/1032 , G06F2212/7202 , G11C5/04 , G11C5/141 , G11C7/10 , G11C7/22 , G11C8/00 , G11C16/32 , G11C29/52 , G11C2029/0411 , G11C2207/2245
Abstract: Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.
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公开(公告)号:US20200210279A1
公开(公告)日:2020-07-02
申请号:US16237263
申请日:2018-12-31
Applicant: Micron Technology, Inc.
Inventor: Jonathan Parry , Nadav Grosz , David Aaron Palmer , Christian M. Gyllenskog
Abstract: Apparatus and methods are disclosed, including using a memory controller to monitor at least one parameter related to power level of a host processor of a host device, and dynamically adjusting at least one of a clock frequency and a voltage level of an error-correcting code (ECC) subsystem of the memory controller based on the at least one parameter to control power usage of the host device.
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公开(公告)号:US20200210106A1
公开(公告)日:2020-07-02
申请号:US16236876
申请日:2018-12-31
Applicant: Micron Technology, Inc.
Inventor: Giuseppe Cariello , Jonathan Parry
Abstract: A memory device may comprise an array of non-volatile memory cells, and a memory controller configured for controlling access to the array of non-volatile memory cells. The memory controller may include firmware configured to control memory device performance to enforce a memory device policy. The memory controller may include at least one hardware register configured to store data indicative of the memory device policy. The firmware may be configured to read the data indicative of the memory device policy and enforce the memory device policy by controlling memory device performance.
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公开(公告)号:US20200210105A1
公开(公告)日:2020-07-02
申请号:US16235925
申请日:2018-12-28
Applicant: Micron Technology, Inc.
Inventor: Fulvio Rori , Chiara Cerafogli , Giuseppe Cariello , Jonathan Parry
IPC: G06F3/06
Abstract: Devices and techniques for accelerated memory device trim initialization are described herein. An initialization of a memory device can be started by the memory device. An accelerated trim command can be received at the memory device from a controller. The memory device can refrain from setting a trim in response to receipt of the accelerated trim command. Here, the trim is expected to be set by the controller. The memory device can then complete the initialization after the trim is set by the controller.
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公开(公告)号:US10359970B2
公开(公告)日:2019-07-23
申请号:US16201576
申请日:2018-11-27
Applicant: Micron Technology, Inc.
Inventor: George Pax , Jonathan Parry
IPC: G06F11/00 , G06F3/06 , G06F11/10 , G11C5/14 , G11C7/10 , G11C8/00 , G11C29/52 , G06F12/02 , G11C5/04 , G11C7/22 , G11C16/32 , G11C29/04
Abstract: Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.
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公开(公告)号:US10162569B2
公开(公告)日:2018-12-25
申请号:US15861374
申请日:2018-01-03
Applicant: Micron Technology, Inc.
Inventor: George Pax , Jonathan Parry
IPC: G06F11/00 , G06F3/06 , G06F11/10 , G11C5/14 , G11C7/10 , G11C8/00 , G11C29/52 , G06F12/02 , G11C5/04 , G11C7/22 , G11C16/32 , G11C29/04
Abstract: Apparatus and methods are provided for operating a non-volatile memory module. In an example, a method can include filling a first plurality of pages of a first non-volatile memory with first data from a first data lane that includes a first volatile memory device, and filling a second plurality of pages of the first non-volatile memory device with second data from a second data lane that includes a second volatile memory device. In certain examples, the first plurality of pages does not include data from the second data lane.
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