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36 条记录 (耗时 0.031 秒)

    Nonvolatile logic circuit and a method for operating the same
    14.
    发明授权
    Nonvolatile logic circuit and a method for operating the same 有权

    公开(公告)号：US08565002B2

    公开(公告)日：2013-10-22

    申请号：US13465889

    申请日：2012-05-07

    申请人： Yukihiro Kaneko

    发明人： Yukihiro Kaneko

    IPC分类号： G11C11/00 ,  G11C11/22

    CPC分类号： H03K19/173

    摘要： A nonvolatile logic circuit includes logic configuration electrodes and input electrodes. The nonvolatile logic circuit is programmable to any one of the logics between the input signals selected from logical conjunction (AND), logical disjunction (OR), logical non-conjunction (NAND), logical non-disjunction (NOR), and logical exclusive disjunction (XOR) by changing applied voltages to the logic configuration electrodes.

    Method for operating a nonvolatile switching device
    15.
    发明授权
    Method for operating a nonvolatile switching device 有权
    用于操作非易失性开关装置的方法

    公开(公告)号：US08565001B2

    公开(公告)日：2013-10-22

    申请号：US13240225

    申请日：2011-09-22

    申请人： Yukihiro Kaneko

    发明人： Yukihiro Kaneko

    IPC分类号： G11C11/22

    CPC分类号： H01L27/10 ,  G11C11/22 ,  G11C11/5657 ,  H01L27/101 ,  H01L27/11502 ,  H01L29/7869

    摘要： A method of flowing a current selectively with a nonvolatile switching device according to the present disclosure includes a step of configuring, in the nonvolatile switching device, any one of a first state in which a current does not flow between the electrode group, a second state in which a current flows selectively between the first electrode and the second electrode, and a third state in which a current flows selectively between the first electrode and the third electrode. When any one of the first state, the second state and the third state is configured, voltages V1, Va, Vb and Vc, which satisfy predetermined inequality set corresponding to the one of the first to third states, are applied to the control electrode, the first electrode, the second electrode, and the third electrode, respectively.

    摘要翻译： 根据本发明的一种使用非易失性开关器件选择性地流动电流的方法包括在非易失性开关器件中配置电流不在电极组之间的第一状态中的任何一种，第二状态 其中电流选择性地在第一电极和第二电极之间流动，并且电流在第一电极和第三电极之间选择性地流动的第三状态。 当配置第一状态，第二状态和第三状态中的任何一个时，满足对应于第一至第三状态之一的预定不等式的电压V1，Va，Vb和Vc被施加到控制电极， 第一电极，第二电极和第三电极。

    Non-volatile logic circuit and a method for operating the same
    16.
    发明授权
    Non-volatile logic circuit and a method for operating the same 有权
    非易失性逻辑电路及其操作方法

    公开(公告)号：US08390322B2

    公开(公告)日：2013-03-05

    申请号：US13221029

    申请日：2011-08-30

    申请人： Yukihiro Kaneko

    发明人： Yukihiro Kaneko

    IPC分类号： H03K19/173 ,  G11C11/22

    CPC分类号： H01L27/101 ,  G11C11/22 ,  H01L27/11502

    摘要： In a non-volatile logic circuit, a first input electrode and a second input electrode are formed on a semiconductor layer and interposed between an electric current source electrode and an output electrode in a plan view. The semiconductor layer is disposed on a ferroelectric layer. A method of operating the non-volatile logic circuit includes a step of writing one state selected from four states by applying voltages to the first and second input electrode, respectively, a step of measuring current generated by applying the voltage between the electric current source electrode and the output electrode to determine, on the basis of the measured current, which of the high or low resistant state the non-volatile logic circuit has.

    摘要翻译： 在非易失性逻辑电路中，第一输入电极和第二输入电极形成在半导体层上并且在平面图中介于电流源电极和输出电极之间。 半导体层设置在铁电层上。 一种操作非易失性逻辑电路的方法包括通过分别向第一和第二输入电极施加电压来写入从四种状态中选出的一种状态的步骤，测量通过在电流源电极 所述输出电极根据所测量的电流来确定所述非易失性逻辑电路具有的高电阻或低电阻状态。

    Semiconductor memory cell and manufacturing method thereof, and semiconductor memory devices
    17.
    发明授权
    Semiconductor memory cell and manufacturing method thereof, and semiconductor memory devices 失效
    半导体存储单元及其制造方法以及半导体存储器件

    公开(公告)号：US08385099B2

    公开(公告)日：2013-02-26

    申请号：US13211983

    申请日：2011-08-17

    申请人： Yukihiro Kaneko ,  Yoshihisa Kato ,  Hiroyuki Tanaka

    发明人： Yukihiro Kaneko ,  Yoshihisa Kato ,  Hiroyuki Tanaka

    IPC分类号： G11C11/22

    CPC分类号： H01L21/28291 ,  G11C11/22 ,  G11C11/223 ,  H01L27/1159 ,  H01L29/516 ,  H01L29/6684 ,  H01L29/78391

    摘要： A semiconductor memory cell includes: a memory element formed by a first field effect transistor having a gate insulating film made of a ferroelectric film; and a select switching element formed by a second field effect transistor having a gate insulating film made of a paraelectric film. The ferroelectric film and the paraelectric film are stacked together with a semiconductor film of a compound semiconductor interposed therebetween. A first gate electrode of the first field effect transistor is formed on a side of the ferroelectric film, and a second gate electrode of the second field effect transistor is formed on a side of the paraelectric film so as to face the first gate electrode. The semiconductor film forms a common channel layer of the first and second field effect transistors.

    摘要翻译： 半导体存储单元包括：由具有由铁电体膜制成的栅极绝缘膜的第一场效应晶体管形成的存储元件; 以及由具有由顺电膜制成的栅极绝缘膜的第二场效应晶体管形成的选择开关元件。 铁电体膜和顺电层与介于其间的化合物半导体的半导体膜层叠。 第一场效应晶体管的第一栅电极形成在铁电体膜的一侧，并且第二场效应晶体管的第二栅电极形成在顺电膜的一侧以面对第一栅电极。 半导体膜形成第一和第二场效应晶体管的公共沟道层。

    Nonvolatile logic circuit and a method for operating the same as an exclusive-OR (XOR) circuit
    18.
    发明授权
    Nonvolatile logic circuit and a method for operating the same as an exclusive-OR (XOR) circuit 有权
    非易失性逻辑电路和与异或（XOR）电路相同的操作方法

    公开(公告)号：US08199555B2

    公开(公告)日：2012-06-12

    申请号：US13222782

    申请日：2011-08-31

    申请人： Yukihiro Kaneko

    发明人： Yukihiro Kaneko

    IPC分类号： G11C11/22

    CPC分类号： H03K19/21 ,  G11C11/22 ,  H01L27/101 ,  H01L27/1159

    摘要： A non-volatile logic circuit includes a control electrode, a ferroelectric layer disposed on the control electrode, a semiconductor layer disposed on the ferroelectric layer, a power electrode and an output electrode disposed on the semiconductor layer, and first to fourth input electrodes disposed on the semiconductor layer. The first and second input electrodes receive first and second inputs, respectively. The third and fourth input electrodes receive inversion signals of the second and first input signal, respectively. A resistance value of the semiconductor layer between the power electrode and the output electrode varies according to the first input signal and the second input signal so that an exclusive-OR signal of the first and second input signals is output from the output electrode.

    摘要翻译： 非易失性逻辑电路包括控制电极，设置在控制电极上的铁电层，设置在强电介质层上的半导体层，设置在半导体层上的电力电极和输出电极以及设置在半导体层上的第一至第四输入电极 半导体层。 第一和第二输入电极分别接收第一和第二输入。 第三和第四输入电极分别接收第二和第一输入信号的反相信号。 电源电极和输出电极之间的半导体层的电阻值根据第一输入信号和第二输入信号而变化，从而从输出电极输出第一和第二输入信号的异或信号。