公开(公告)号：US11658622B2

公开(公告)日：2023-05-23

申请号：US17207879

申请日：2021-03-22

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi Tanaka ,  Kazuo Watanabe ,  Yusuke Tanaka ,  Satoshi Arayashiki

IPC: H03F1/22 ,  H03F3/217 ,  H03F1/56 ,  H03F1/02

CPC classification number: H03F3/217 ,  H03F1/0205 ,  H03F1/565 ,  H03F3/2171 ,  H03F2200/171 ,  H03F2200/387 ,  H03F2200/451

Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.

公开(公告)号：US09918289B2

公开(公告)日：2018-03-13

申请号：US15451490

申请日：2017-03-07

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi Tanaka ,  Takayuki Tsutsui ,  Yusuke Tanaka ,  Hayato Nakamura ,  Kazuhito Nakai

IPC: H04B7/212 ,  H04W52/52 ,  H04L5/14 ,  H04B7/26 ,  H03F3/195 ,  H03F3/24 ,  H03F3/68 ,  H03F1/02 ,  H04W72/04 ,  H04W88/06

CPC classification number: H04W52/52 ,  H03F1/0261 ,  H03F3/195 ,  H03F3/245 ,  H03F3/68 ,  H03F2200/111 ,  H04B7/265 ,  H04L5/14 ,  H04W72/042 ,  H04W88/06

Abstract: Provided is a communication unit that includes first and second power-amplification modules, which can be integrated. The first power-amplification module includes a first power-amplifier for a first frequency band in a first communication scheme, a second power-amplifier for a second frequency band in the first communication scheme, a third power-amplifier for a third frequency band in a second communication scheme, a fourth power-amplifier for a fourth frequency band in the second communication scheme, a first bias circuit that generates a first bias current to the first and second power-amplifiers, and a bias current circuit that converts the first bias current into a second bias current to the third and fourth power-amplifiers. The second power-amplification module includes a fifth power-amplifier for a fifth frequency band in the first communication scheme, and a second bias circuit that generates a third bias current to the fifth power-amplifier.

公开(公告)号：US20220294401A1

公开(公告)日：2022-09-15

申请号：US17805259

申请日：2022-06-03

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Kenji Tahara ,  Kenichi Shimamoto ,  Yusuke Tanaka

IPC: H03F3/24 ,  H03F3/195 ,  H03F1/02

Abstract: Increase in power-added efficiency can be achieved. A second base of a second transistor is connected to a first collector of a first transistor. A third base of a third transistor is connected to the first collector of the first transistor, and a third collector of the third transistor is connected to a second collector of the second transistor. A second bias circuit includes a fifth transistor connected to the second base of the second transistor. A third bias circuit includes a sixth transistor connected to the third base of the third transistor. A first current limiting circuit includes a seventh transistor, a first collector resistor, and a first base resistor. A second current limiting circuit includes an eighth transistor, a second collector resistor, and a second base resistor.

公开(公告)号：US10923470B2

公开(公告)日：2021-02-16

申请号：US16826074

申请日：2020-03-20

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Shigeki Koya ,  Takayuki Tsutsui ,  Kazuhito Nakai ,  Yusuke Tanaka

IPC: H01L27/06 ,  H01L23/522 ,  H01L23/528 ,  H01L29/66

Abstract: A semiconductor device includes a plurality of unit transistors that are arranged on a surface of a substrate in a first direction. Input capacitive elements are arranged so as to correspond to the unit transistors. An emitter common wiring line is connected to emitter layers of the unit transistors. A via-hole extending from the emitter common wiring line to a back surface of the substrate is disposed at a position overlapping the emitter common wiring line. A collector common wiring line is connected to collector layers of the unit transistors. The input capacitive elements, the emitter common wiring line, the unit transistors, and the collector common wiring line are arranged in this order in a second direction. Base wiring lines that connect the input capacitive elements to base layers of the corresponding unit transistors intersect the emitter common wiring line without physical contact.

公开(公告)号：US11610883B2

公开(公告)日：2023-03-21

申请号：US17149851

申请日：2021-01-15

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Shigeki Koya ,  Takayuki Tsutsui ,  Kazuhito Nakai ,  Yusuke Tanaka

IPC: H01L27/06 ,  H01L23/522 ,  H01L23/528 ,  H01L29/66

Abstract: A semiconductor device includes a plurality of unit transistors that are arranged on a surface of a substrate in a first direction. Input capacitive elements are arranged so as to correspond to the unit transistors. An emitter common wiring line is connected to emitter layers of the unit transistors. A via-hole extending from the emitter common wiring line to a back surface of the substrate is disposed at a position overlapping the emitter common wiring line. A collector common wiring line is connected to collector layers of the unit transistors. The input capacitive elements, the emitter common wiring line, the unit transistors, and the collector common wiring line are arranged in this order in a second direction. Base wiring lines that connect the input capacitive elements to base layers of the corresponding unit transistors intersect the emitter common wiring line without physical contact.

公开(公告)号：US11469715B2

公开(公告)日：2022-10-11

申请号：US17109389

申请日：2020-12-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Jun Enomoto ,  Kazuo Watanabe ,  Satoshi Tanaka ,  Yusuke Tanaka ,  Makoto Itou

IPC: H03F1/22 ,  H03F1/32 ,  H03F3/21

Abstract: A power amplifier circuit includes first and second bias circuits configured to provide first and second biases, respectively, a first transistor having an emitter connected to a reference potential, a base configured to receive the first bias via a first resistor and receive a radio-frequency input signal via a first capacitor, and a collector configured to output an amplified radio-frequency signal, a second transistor having a base connected to the reference potential via a second capacitor and configured to receive the second bias via a second resistor, an emitter configured to receive the radio-frequency signal, and a collector connected to a power supply potential via a third inductor and configured to output a radio-frequency output signal, and an impedance circuit having a first end connected to an output section of the second bias circuit and configured to apply an alternating-current signal to a path extending from the second bias circuit.

公开(公告)号：US11349521B2

公开(公告)日：2022-05-31

申请号：US17235309

申请日：2021-04-20

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kenji Tahara ,  Seikoh Ono ,  Kunihiro Watanabe ,  Hiroshi Masuda ,  Naohide Tomita ,  Takeshi Kogure ,  Yusuke Tanaka

IPC: H04B1/44

Abstract: A radio-frequency signal transmitting and receiving circuit includes a power amplifier, a transmission band pass filter configured to transmit a radio-frequency input signal, a first reception band pass filter configured to transmit a first radio-frequency reception signal, a first low-noise amplifier configured to amplify the first radio-frequency reception signal and output a first radio-frequency output signal, a first transmitting and receiving filter having a first end and a second end, the first end being electrically connected to a first antenna terminal, and a switch configured to electrically connect the transmission band pass filter to the second end of the first transmitting and receiving filter to output the radio-frequency input signal to the first antenna terminal and electrically connect the second end of the first transmitting and receiving filter to the first reception band pass filter to receive the first radio-frequency reception signal from the first antenna terminal.

公开(公告)号：US10985715B2

公开(公告)日：2021-04-20

申请号：US16549057

申请日：2019-08-23

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi Tanaka ,  Kazuo Watanabe ,  Yusuke Tanaka ,  Satoshi Arayashiki

IPC: H03F1/22 ,  H03F3/217 ,  H03F1/56 ,  H03F1/02

Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.