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公开(公告)号：US11610883B2
公开(公告)日：2023-03-21
申请号：US17149851
申请日：2021-01-15
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Shigeki Koya , Takayuki Tsutsui , Kazuhito Nakai , Yusuke Tanaka
IPC: H01L27/06 , H01L23/522 , H01L23/528 , H01L29/66
Abstract: A semiconductor device includes a plurality of unit transistors that are arranged on a surface of a substrate in a first direction. Input capacitive elements are arranged so as to correspond to the unit transistors. An emitter common wiring line is connected to emitter layers of the unit transistors. A via-hole extending from the emitter common wiring line to a back surface of the substrate is disposed at a position overlapping the emitter common wiring line. A collector common wiring line is connected to collector layers of the unit transistors. The input capacitive elements, the emitter common wiring line, the unit transistors, and the collector common wiring line are arranged in this order in a second direction. Base wiring lines that connect the input capacitive elements to base layers of the corresponding unit transistors intersect the emitter common wiring line without physical contact.
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公开(公告)号：US10319710B2
公开(公告)日：2019-06-11
申请号：US15497663
申请日：2017-04-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yuri Honda , Fumio Harima , Kazuhito Nakai
IPC: H01L27/02 , H01L23/48 , H01L27/082 , H01L27/088 , H03F3/19 , H03F3/21
Abstract: Provided is a semiconductor device with a reduced variation in temperature among a plurality of unit transistors. A semiconductor device includes: a semiconductor substrate; and a transistor group including at least one column in which a plurality of unit transistors are aligned and arranged along a first axis on the semiconductor substrate. A first column of the at least one column includes: a first group of transistors including two of the unit transistors that are adjacent to each other with a first distance therebetween, and a second group of transistors including two of the unit transistors that are adjacent to each other with a second distance therebetween, the first group of transistors is disposed at a position closer to a center of the first column along the first axis than the second group of transistors, and the first distance is larger than the second distance.
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公开(公告)号：US11574898B2
公开(公告)日：2023-02-07
申请号：US17233542
申请日：2021-04-19
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Goto , Kazuhito Nakai
IPC: H01L23/538 , H04B1/40 , H03F1/02 , H01L25/16 , H01L23/498 , H03F3/20 , H03F1/56
Abstract: A radio-frequency module including a module substrate having a first main surface and a second main surface on opposite sides; a low-noise amplifier disposed on the second main surface; and a power amplifier circuit in a Doherty configuration. The power amplifier including a first phase circuit; a second phase circuit; a carrier amplifier disposed on the first main surface and including an input terminal connected to a first end of the first phase circuit and an output terminal connected to a first end of the second phase circuit; and a peaking amplifier disposed on the first main surface and including an input terminal connected to a second end of the first phase circuit and an output terminal connected to a second end of the second phase circuit.
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公开(公告)号：US11329676B2
公开(公告)日：2022-05-10
申请号：US17195684
申请日：2021-03-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kazuhito Nakai , Satoshi Goto , Hidetaka Takahashi , Daerok Oh
Abstract: A radio frequency module includes: a module board that includes a first principal surface and a second principal surface on opposite sides of the module board; a power amplifier; and a first circuit component. The power amplifier includes: a first amplifying element; a second amplifying element; and an output transformer that includes a primary coil and a secondary coil. An end of the primary coil is connected to an output terminal of the first amplifying element, another end of the primary coil is connected to an output terminal of the second amplifying element, an end of the secondary coil is connected to an output terminal of the power amplifier, the first amplifying element and the second amplifying element are disposed on the first principal surface, and the first circuit component is disposed on the second principal surface.
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公开(公告)号：US10483928B2
公开(公告)日：2019-11-19
申请号：US15926165
申请日：2018-03-20
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasushi Oyama , Takayuki Tsutsui , Kazuhito Nakai
Abstract: A power amplification module includes a first input terminal that receives a first transmit signal in a first frequency band, a second input terminal that receives a second transmit signal in a second frequency band having a narrower transmit/receive frequency interval than the first frequency band, a first amplification circuit that receives and amplifies the first transmit signal to produce a first amplified signal and outputs the first amplified signal, a second amplification circuit that receives and amplifies the second transmit signal to produce a second amplified signal and outputs the second amplified signal, a third amplification circuit that receives and amplifies the first or second amplified signal to produce an output signal and outputs the output signal, and an attenuation circuit located between the second input terminal and the second amplification circuit and configured to attenuate a receive frequency band component of the second frequency band.
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Patent Agency Ranking
公开(公告)号：US09918289B2
公开(公告)日：2018-03-13
申请号：US15451490
申请日：2017-03-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Takayuki Tsutsui , Yusuke Tanaka , Hayato Nakamura , Kazuhito Nakai
IPC: H04B7/212 , H04W52/52 , H04L5/14 , H04B7/26 , H03F3/195 , H03F3/24 , H03F3/68 , H03F1/02 , H04W72/04 , H04W88/06
CPC classification number: H04W52/52 , H03F1/0261 , H03F3/195 , H03F3/245 , H03F3/68 , H03F2200/111 , H04B7/265 , H04L5/14 , H04W72/042 , H04W88/06
Abstract: Provided is a communication unit that includes first and second power-amplification modules, which can be integrated. The first power-amplification module includes a first power-amplifier for a first frequency band in a first communication scheme, a second power-amplifier for a second frequency band in the first communication scheme, a third power-amplifier for a third frequency band in a second communication scheme, a fourth power-amplifier for a fourth frequency band in the second communication scheme, a first bias circuit that generates a first bias current to the first and second power-amplifiers, and a bias current circuit that converts the first bias current into a second bias current to the third and fourth power-amplifiers. The second power-amplification module includes a fifth power-amplifier for a fifth frequency band in the first communication scheme, and a second bias circuit that generates a third bias current to the fifth power-amplifier.
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公开(公告)号：US20170317066A1
公开(公告)日：2017-11-02
申请号：US15497663
申请日：2017-04-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yuri Honda , Fumio Harima , Kazuhito Nakai
IPC: H01L27/02 , H01L27/082 , H01L23/48 , H01L27/088 , H03F3/19 , H03F3/21
CPC classification number: H01L27/0211 , H01L23/481 , H01L27/082 , H01L27/088 , H03F3/19 , H03F3/21 , H03F2200/408 , H03F2200/451
Abstract: Provided is a semiconductor device with a reduced variation in temperature among a plurality of unit transistors. A semiconductor device includes: a semiconductor substrate; and a transistor group including at least one column in which a plurality of unit transistors are aligned and arranged along a first axis on the semiconductor substrate. A first column of the at least one column includes: a first group of transistors including two of the unit transistors that are adjacent to each other with a first distance therebetween, and a second group of transistors including two of the unit transistors that are adjacent to each other with a second distance therebetween, the first group of transistors is disposed at a position closer to a center of the first column along the first axis than the second group of transistors, and the first distance is larger than the second distance.
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公开(公告)号：US10923470B2
公开(公告)日：2021-02-16
申请号：US16826074
申请日：2020-03-20
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Shigeki Koya , Takayuki Tsutsui , Kazuhito Nakai , Yusuke Tanaka
IPC: H01L27/06 , H01L23/522 , H01L23/528 , H01L29/66
Abstract: A semiconductor device includes a plurality of unit transistors that are arranged on a surface of a substrate in a first direction. Input capacitive elements are arranged so as to correspond to the unit transistors. An emitter common wiring line is connected to emitter layers of the unit transistors. A via-hole extending from the emitter common wiring line to a back surface of the substrate is disposed at a position overlapping the emitter common wiring line. A collector common wiring line is connected to collector layers of the unit transistors. The input capacitive elements, the emitter common wiring line, the unit transistors, and the collector common wiring line are arranged in this order in a second direction. Base wiring lines that connect the input capacitive elements to base layers of the corresponding unit transistors intersect the emitter common wiring line without physical contact.
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公开(公告)号：US09954504B2
公开(公告)日：2018-04-24
申请号：US15365092
申请日：2016-11-30
Applicant: MURATA MANUFACTURING CO., LTD.
Inventor： Yasushi Oyama , Takayuki Tsutsui , Kazuhito Nakai
CPC classification number: H03G1/0094 , H03F1/56 , H03F3/19 , H03F3/213 , H03F3/245 , H03F3/72 , H03F2200/111 , H03F2200/165 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2203/7209 , H03G2201/106 , H03G2201/40
Abstract: A power amplification module includes a first input terminal that receives a first transmit signal in a first frequency band, a second input terminal that receives a second transmit signal in a second frequency band having a narrower transmit/receive frequency interval than the first frequency band, a first amplification circuit that receives and amplifies the first transmit signal to produce a first amplified signal and outputs the first amplified signal, a second amplification circuit that receives and amplifies the second transmit signal to produce a second amplified signal and outputs the second amplified signal, a third amplification circuit that receives and amplifies the first or second amplified signal to produce an output signal and outputs the output signal, and an attenuation circuit located between the second input terminal and the second amplification circuit and configured to attenuate a receive frequency band component of the second frequency band.
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公开(公告)号：US09882533B2
公开(公告)日：2018-01-30
申请号：US15274539
申请日：2016-09-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yusuke Shimamune , Satoshi Tanaka , Takayuki Tsutsui , Hayato Nakamura , Kazuhito Nakai , Fuminori Morisawa
CPC classification number: H03F1/0222 , G05F3/262 , H03F1/301 , H03F1/302 , H03F3/04 , H03F3/191 , H03F3/193 , H03F3/21 , H03F2200/18 , H03F2200/451
Abstract: Provided is a current output circuit that includes: a first FET that has a power supply voltage supplied to a source thereof, that has a first voltage supplied to a gate thereof and that outputs a first current from a drain thereof; a second FET that has the power supply voltage supplied to a source thereof, that has the first voltage supplied to a gate thereof and that outputs an output current from a drain thereof; a first control circuit that controls the first voltage such that the first current comes to be at a target level; and a second control circuit that performs control such that a drain voltage of the first FET and a drain voltage of the second FET are made equal to each other.
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