公开(公告)号：US20200381045A1

公开(公告)日：2020-12-03

申请号：US16970495

申请日：2019-03-12

Applicant: NEC Corporation

Inventor： Toshitsugu SAKAMOTO ,  Ryusuke NEBASHI ,  Makoto MIYAMURA ,  Xu BAI ,  Yukihide TSUJI

IPC: G11C13/00 ,  H03K19/177 ,  H01L27/24 ,  H01L45/00

Abstract: A semiconductor device which includes: a switch array in which a switch cell including a variable resistance switch is arranged at each location where a plurality of wires constituting a crossbar switch intersect; a first selection circuit that selects all of the variable resistance switches included in the switch array; a second selection circuit that selects any of the variable resistance switches included in the switch array; a reading circuit that reads a state of the variable resistance switch selected by any of the first selection circuit and the second selection circuit; and an error detection circuit that detects, based on a state of the variable resistance switch read by the reading circuit, an error in at least any of the variable resistance switches included in the switch array.

公开(公告)号：US20200350909A1

公开(公告)日：2020-11-05

申请号：US16964392

申请日：2019-02-08

Applicant: NEC Corporation

Inventor： Makoto MIYAMURA ,  Ryusuke NEBASHI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Xu BAI ,  Ayuka TADA

IPC: H03K17/693 ,  G11C13/00

Abstract: A semiconductor device includes: first wires which extend in a first direction; second wires extending in a second direction; a unit element which comprises two variable resistance elements connected in series, and has one end connected to a first wire and the other end connected to a second wire; a first control line for controlling the supply of a voltage to the first wire; a second control line for controlling the supply of a voltage to the second wire; and a cell circuit connected to an intermediate node between the two variable resistance elements and also connected to the first control line and the second control line. The cell circuit has: a cell transistor connected to an intermediate node writing driver which supplies a voltage to the intermediate node; and a cell control circuit which controls an electrical conduction state of the cell transistor.

公开(公告)号：US20200251496A1

公开(公告)日：2020-08-06

申请号：US16648757

申请日：2018-09-14

Applicant: NEC Corporation

Inventor： Makoto MIYAMURA ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Ryusuke NEBASHI ,  Ayuka TADA ,  Xu BAI

IPC: H01L27/118 ,  G11C11/56 ,  G11C13/00 ,  G06F30/327

Abstract: A programmable integrated circuit includes: a crossbar switch constituted of a plurality of first wires arranged in a first direction, a plurality of second wires arranged in a second direction intersecting the first direction, and resistance change type elements connecting the first wires and the second wires; an output buffer group constituted of at least two output buffers operating with different drive powers; and a logic circuit group constituted of at least one logic circuit connected to an output of the second wire. The output buffers in the output buffer group is connected to an input of any one of a plurality of the first wires.

公开(公告)号：US20200234760A1

公开(公告)日：2020-07-23

申请号：US16489912

申请日：2018-02-28

Applicant: NEC CORPORATION

Inventor： Makoto MIYAMURA ,  Yukihide TSUJI ,  Toshitsugu SAKAMOTO ,  Ryusuke NEBASHI ,  Ayuka TADA ,  Xu BAI

IPC: G11C13/00

Abstract: In order to eliminate an increase in the source potential of a transistor selected during writing or reading, this semiconductor device is equipped with: a variable-resistance type first switch having a first terminal and a second terminal; a variable-resistance type second switch having a third terminal and a fourth terminal, the third terminal being connected to the second terminal to form an intermediate node; first wiring connected to the first terminal; second wiring connected to the fourth terminal and, in a planar view, extending in a direction crossing the first wiring; a first selection transistor connected to the first wiring; a second selection transistor connected to the second wiring; a first well terminal connection line to which a well terminal of the first selection transistor is connected; and a second well terminal connection line to which a well terminal of the second selection transistor is connected.

公开(公告)号：US20190028101A1

公开(公告)日：2019-01-24

申请号：US16061701

申请日：2017-01-16

Applicant: NEC Corporation

Inventor： Ryusuke NEBASHI ,  Toshitsugu SAKAMOTO ,  Makoto MIYAMURA ,  Yukihide TSUJI ,  Ayuka TADA ,  Xu BAI

IPC: H03K19/003 ,  H01L27/24 ,  G11C13/00 ,  H01L45/00 ,  G06F11/07

Abstract: An object of the present invention is to provide a logic integrated circuit that increases reliability of configuration information held in a switch while maintaining high tamper resistance and a small chip area. The logic integrated circuit according to the present invention includes: a three-terminal resistance change switch including a first resistance change switch and a second resistance change switch connected in series; a reading circuit which reads first data based on a resistance state of the first resistance change switch and second data based on a resistance state of the second resistance change switch; and a first error detection circuit which compares the first data with the second data and issue an output based on a result of the comparison.

公开(公告)号：US20210020238A1

公开(公告)日：2021-01-21

申请号：US16980211

申请日：2018-03-23

Applicant: NEC Corporation

Inventor： Xu BAI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Makoto MIYAMURA ,  Ryusuke NEBASHI ,  Ayuka TADA

IPC: G11C13/00 ,  H03M5/02 ,  H03K19/1776

Abstract: A reconfigurable circuit includes: a complementary resistive switch including a first resistive switch, a second resistive switch and a selection transistor, wherein a first terminal of the first resistive switch is connected to a first terminal of the second resistive switch and connected to a first terminal of the selection transistor; a first current source having a first terminal connected to a second terminal of the first resistive switch and a second terminal connected to a ground voltage line; a second current source having a first terminal connected to a second terminal of the second resistive switch and a second terminal connected to the ground voltage line; and a resistor having a first terminal connected to a second terminal of the selection transistor and a second terminal connected to a power voltage line.

公开(公告)号：US20200295764A1

公开(公告)日：2020-09-17

申请号：US16083965

申请日：2017-04-06

Applicant: NEC Corporation

Inventor： Xu BAI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Makoto MIYAMURA ,  Ayuka TADA ,  Ryusuke NEBASHI

IPC: H03K19/17736 ,  H03K19/17796 ,  H03K19/17704 ,  H03K19/17784 ,  H03K19/173

Abstract: A reconfigurable circuit includes: a first line; a first switch element disposed between the first line and a first power source line of first voltage; a second line; a second switch element disposed between the second line and a second power source line of second voltage which is different from the first voltage; and a resistive switch assembly disposed between the first line and the second line. The resistive switch assembly includes: a first non-volatile resistive switch; and a second non-volatile resistive switch whose first end is coupled to a first end of the first non-volatile resistive switch. The second end of the first non-volatile resistive switch is coupled to the first line, and the second end of the second non-volatile resistive switch is coupled to the second line.

公开(公告)号：US20190180818A1

公开(公告)日：2019-06-13

申请号：US16324782

申请日：2017-09-11

Applicant: NEC Corporation

Inventor： Makoto MIYAMURA ,  Ryusuke NEBASHI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Xu BAI ,  Ayuka TADA

IPC: G11C13/00

Abstract: In order to provide a highly reliable crossbar circuit that enables salvation of reversal of a resistive state of a variable resistance element, the semiconductor device has a configuration obtained by parallelly arranging two unit elements, each including variable-resistance two-terminal elements connected in series, the semiconductor device being provided with: a unit element group being connected to a first wiring and a second wiring; a first programming driver that changes, via the first wiring, a resistive state of the two-terminal element constituting the unit element group; a first selection transistor being connected to the first wiring and the first programming driver; a second programming driver that changes, via the second wiring, a resistive state of the two-terminal element constituting the unit element group; and a second selection transistor being connected to the second wiring and the second programming driver.

公开(公告)号：US20190052273A1

公开(公告)日：2019-02-14

申请号：US15752330

申请日：2016-08-31

Applicant: NEC Corporation

Inventor： Ayuka TADA ,  Noboru SAKIMURA ,  Makoto MIYAMURA ,  Yukihide TSUJI ,  Ryusuke NEBASHI ,  Xu BAI ,  Toshitsugu SAKAMOTO

IPC: H03K19/177 ,  G06F17/50 ,  H01L27/24 ,  H01L45/00

Abstract: An object of the present invention is to provide a method for effectively performing characterization for circuit verification by static timing analysis, of a programmable logic integrated circuit including a crossbar switch including a resistance-variable element, and a logic circuit logically configured with the crossbar switch, wherein: the programmable logic integrated circuit is divided into a plurality of leaf cells including a plurality of load circuits including a part of the crossbar switch, and a power supply element input to the crossbar switch; the leaf cell is divided into delay paths each including a base leaf cell and a correction leaf cell; and circuit verification is performed based on a delay information library in which a delay time for the base leaf cell and a correction delay for the correction leaf cell are integrated into a delay time for the leaf cell.

公开(公告)号：US20180157779A1

公开(公告)日：2018-06-07

申请号：US15576947

申请日：2016-05-23

Applicant: NEC Corporation

Inventor： Noboru SAKIMURA ,  Yukihide TSUJI ,  Ayuka TADA ,  Xu BAI ,  Makoto MIYAMURA ,  Ryusuke NEBASHI

IPC: G06F17/50 ,  H03K19/003 ,  G11C7/22

Abstract: Provided is a programmable logic integrated circuit wherein even if a failure occurs in any resistance-variable element, remedy would be possible and hence the improvement of reliability has been achieved. In a programmable logic integrated circuit comprising resistance-variable elements, when the states of the resistance-variable elements are to be changed according to externally inputted configuration information, a control means uses a reading means to read the states of the respective resistance-variable elements, and then uses a writing means to change only the states of resistance-changing elements that are different from a state indicated by the configuration information.