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    LOGIC INTEGRATED CIRCUIT
    1.
    发明申请
    LOGIC INTEGRATED CIRCUIT 审中-公开

    公开(公告)号：US20200266822A1

    公开(公告)日：2020-08-20

    申请号：US16648820

    申请日：2018-09-14

    Applicant: NEC Corporation

    Inventor： Yukihide TSUJI ,  Toshitsugu SAKAMOTO ,  Makoto MIYAMURA ,  Ryusuke NEBASHI ,  Ayuka TADA ,  Xu BAI

    IPC: H03K19/185 ,  H03K19/173 ,  H03K19/17704 ,  G11C13/00 ,  H01L27/24 ,  H01L45/00 ,  H03K19/17728 ,  H03K19/17756 ,  G06F7/57

    Abstract: This logic integrated circuit has a plurality of first switch cells including variable resistance elements and a plurality of second switch cells including variable resistance elements. The logic integrated circuit comprises: a first output port and a second output port; the plurality of first switch cells for switching the electrical connections between a first wire and a third wire; the plurality of second switch cells for switching the electrical connections between a second wire and the third wire; a first control transistor which is connected to the first wire and which is for switching the electrical connections between the first wire and a first power line supplying power to the first wire; and a second control transistor which is connected to the second wire and which is for switching the electrical connections between the second wire and the first power line supplying power to the second wire.

    RECONFIGURABLE CIRCUIT AND THE METHOD FOR USING THE SAME
    4.
    发明申请
    RECONFIGURABLE CIRCUIT AND THE METHOD FOR USING THE SAME 审中-公开

    公开(公告)号：US20200295761A1

    公开(公告)日：2020-09-17

    申请号：US16083978

    申请日：2016-05-13

    Applicant: NEC Corporation

    Inventor： Xu BAI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Makoto MIYAMURA ,  Ayuka TADA ,  Ryusuke NEBASHI

    IPC: H03K19/177

    Abstract: A reconfigurable circuit comprising: a first line; a first switch element disposed between the first line and a first power source line of first voltage; a second line; a second switch element disposed between the second line and a second power source line of second voltage which is different from the first voltage; and a resistive switch assembly disposed between the first line and the second line. The resistive switch assembly including a first non-volatile resistive switch, and a second non-volatile resistive switch whose first end is coupled to a first end of the first non-volatile resistive switch. The second end of the first non-volatile resistive switch is coupled to the first line, and the second end of the second non-volatile resistive switch is coupled to the second line.

    PROGRAMMABLE LOGIC INTEGRATED CIRCUIT
    6.
    发明申请
    PROGRAMMABLE LOGIC INTEGRATED CIRCUIT 有权
    可编程逻辑集成电路

    公开(公告)号：US20170070228A1

    公开(公告)日：2017-03-09

    申请号：US15122433

    申请日：2015-02-27

    Applicant: NEC Corporation

    Inventor： Ryusuke NEBASHI ,  Makoto MIYAMURA ,  Noboru SAKIMURA ,  Yukihide TSUJI ,  Ayuka TADA

    IPC: H03K19/177 ,  G11C29/00 ,  H03K19/173

    CPC classification number: H03K19/17736 ,  G11C29/86 ,  H03K19/1736 ,  H03K19/1776

    Abstract: In a programmable logic integrated circuit, providing a spare circuit in preparation for the occurrence of a defective element results in a redundant circuit configuration. A programmable logic integrated circuit according to the present invention has: a plurality of logic blocks; a switch block for switching the connections between row and column wires by nonvolatile switch elements for switching; and a shifter block for connecting an input/output wire to said switch block. The shifter block includes a redundant wire and is equipped with nonvolatile switch elements for shifting that control the connections of the wires constituting said redundant wire and said row wires.

    Abstract translation: 在可编程逻辑集成电路中，提供备用电路以准备故障元件的出现导致冗余电路配置。 根据本发明的可编程逻辑集成电路具有：多个逻辑块; 用于通过用于切换的非易失性开关元件来切换行和列线之间的连接的开关块; 以及用于将输入/输出线连接到所述开关块的移位块。 移位器块包括冗余线，并且配备有用于移位的非易失性开关元件，用于控制构成所述冗余线和所述行线的线的连接。

    SEMICONDUCTOR INTEGRATED CIRCUIT AND POWER SUPPLY CONTROL METHOD THEREFOR
    7.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT AND POWER SUPPLY CONTROL METHOD THEREFOR 有权
    半导体集成电路及其电源控制方法

    公开(公告)号：US20160077563A1

    公开(公告)日：2016-03-17

    申请号：US14786453

    申请日：2014-01-07

    Applicant: NEC CORPORATION

    Inventor： Yukihide TSUJI ,  Noboru SAKIMURA ,  Ryusuke NEBASHI ,  Ayuka TADA

    IPC: G06F1/26 ,  G06F13/40

    CPC classification number: G06F1/3287 ,  G06F1/3209 ,  G06F1/3243 ,  G06F13/4022 ,  Y02D10/151 ,  Y02D10/152 ,  Y02D10/171

    Abstract: A semiconductor integrated circuit (100) comprising: a plurality of processing circuits (11, 12, 13) each including a notification units for outputting a notification signal according to the processing state of the own processing circuit; a plurality of power supply switch units (SW1, SW2, SW3) for switching the connection states between the respective processing circuits and a power supply source; a power supply switch control circuit which is connected with the notification means (111, 121, 131), stores power supply control information (101) including a plurality of connection statuses, and controls the connection states on the basis of the notification signals and the power supply control information; and a data bus (BS) and the like connecting each of the processing circuits and the power supply switch control circuit, wherein: at least two or more of the plurality of processing circuits update the power supply control information via the data bus and the like before outputting a notification signal; and the power supply switch control circuit accepts a notification signal outputted from any one of the plurality of processing circuits after the update, and accordingly controls the connection states of respective ones of the plurality of power supply switch units on the basis of the updated power supply control information.

    Abstract translation: 一种半导体集成电路（100），包括：多个处理电路（11,12,13），每个处理电路包括根据本处理电路的处理状态输出通知信号的通知单元; 用于切换各个处理电路和电源之间的连接状态的多个电源开关单元（SW1，SW2，SW3） 与通知装置（111,121,131）连接的电源开关控制电路存储包括多个连接状态的电源控制信息（101），并且基于通知信号来控制连接状态， 电源控制信息; 以及连接处理电路和电源开关控制电路中的每一个的数据总线（BS）等，其中：多个处理电路中的至少两个或更多个通过数据总线等来更新电源控制信息 在输出通知信号之前; 并且电源开关控制电路接受在更新之后从多个处理电路中的任一个输出的通知信号，并且因此基于更新的电源来控制多个电源开关单元中的各个电源开关单元的连接状态 控制信息。

    DESIGN ASSISTANCE SYSTEM AND DESIGN ASSISTANCE METHOD
    9.
    发明申请
    DESIGN ASSISTANCE SYSTEM AND DESIGN ASSISTANCE METHOD 有权

    公开(公告)号：US20210133379A1

    公开(公告)日：2021-05-06

    申请号：US16478517

    申请日：2018-01-22

    Applicant: NEC Corporation

    Inventor： Ryusuke NEBASHI ,  Toshitsugu SAKAMOTO ,  Makoto MIYAMURA ,  Yukihide TSUJI ,  Ayuka TADA ,  Xu BAI

    IPC: G06F30/31 ,  G06F30/394

    Abstract: A design assistance system according to the present invention assists in designing a circuit to be mounted on a programmable logic integrated circuit including a resistance change element. The design assistance system includes: a memory; and at least one processor coupled to the memory. The processor performs operations. The operations includes: generating rewriting history information indicating a number (count) of changing times of a state of the resistance change element; calculating an abrasion cost of a switch included in the circuit, based on the rewriting history information; and carrying out wiring of the circuit, based on an evaluation function including the abrasion cost.

    SEMICONDUCTOR DEVICE
    10.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200350909A1

    公开(公告)日：2020-11-05

    申请号：US16964392

    申请日：2019-02-08

    Applicant: NEC Corporation

    Inventor： Makoto MIYAMURA ,  Ryusuke NEBASHI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Xu BAI ,  Ayuka TADA

    IPC: H03K17/693 ,  G11C13/00

    Abstract: A semiconductor device includes: first wires which extend in a first direction; second wires extending in a second direction; a unit element which comprises two variable resistance elements connected in series, and has one end connected to a first wire and the other end connected to a second wire; a first control line for controlling the supply of a voltage to the first wire; a second control line for controlling the supply of a voltage to the second wire; and a cell circuit connected to an intermediate node between the two variable resistance elements and also connected to the first control line and the second control line. The cell circuit has: a cell transistor connected to an intermediate node writing driver which supplies a voltage to the intermediate node; and a cell control circuit which controls an electrical conduction state of the cell transistor.

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