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    RECONFIGURABLE CIRCUIT AND THE METHOD FOR USING THE SAME
    1.
    发明申请
    RECONFIGURABLE CIRCUIT AND THE METHOD FOR USING THE SAME 审中-公开

    公开(公告)号：US20200295761A1

    公开(公告)日：2020-09-17

    申请号：US16083978

    申请日：2016-05-13

    Applicant: NEC Corporation

    Inventor： Xu BAI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Makoto MIYAMURA ,  Ayuka TADA ,  Ryusuke NEBASHI

    IPC: H03K19/177

    Abstract: A reconfigurable circuit comprising: a first line; a first switch element disposed between the first line and a first power source line of first voltage; a second line; a second switch element disposed between the second line and a second power source line of second voltage which is different from the first voltage; and a resistive switch assembly disposed between the first line and the second line. The resistive switch assembly including a first non-volatile resistive switch, and a second non-volatile resistive switch whose first end is coupled to a first end of the first non-volatile resistive switch. The second end of the first non-volatile resistive switch is coupled to the first line, and the second end of the second non-volatile resistive switch is coupled to the second line.

    PROGRAMMABLE LOGIC INTEGRATED CIRCUIT
    3.
    发明申请
    PROGRAMMABLE LOGIC INTEGRATED CIRCUIT 有权
    可编程逻辑集成电路

    公开(公告)号：US20170070228A1

    公开(公告)日：2017-03-09

    申请号：US15122433

    申请日：2015-02-27

    Applicant: NEC Corporation

    Inventor： Ryusuke NEBASHI ,  Makoto MIYAMURA ,  Noboru SAKIMURA ,  Yukihide TSUJI ,  Ayuka TADA

    IPC: H03K19/177 ,  G11C29/00 ,  H03K19/173

    CPC classification number: H03K19/17736 ,  G11C29/86 ,  H03K19/1736 ,  H03K19/1776

    Abstract: In a programmable logic integrated circuit, providing a spare circuit in preparation for the occurrence of a defective element results in a redundant circuit configuration. A programmable logic integrated circuit according to the present invention has: a plurality of logic blocks; a switch block for switching the connections between row and column wires by nonvolatile switch elements for switching; and a shifter block for connecting an input/output wire to said switch block. The shifter block includes a redundant wire and is equipped with nonvolatile switch elements for shifting that control the connections of the wires constituting said redundant wire and said row wires.

    Abstract translation: 在可编程逻辑集成电路中，提供备用电路以准备故障元件的出现导致冗余电路配置。 根据本发明的可编程逻辑集成电路具有：多个逻辑块; 用于通过用于切换的非易失性开关元件来切换行和列线之间的连接的开关块; 以及用于将输入/输出线连接到所述开关块的移位块。 移位器块包括冗余线，并且配备有用于移位的非易失性开关元件，用于控制构成所述冗余线和所述行线的线的连接。

    LOGIC INTEGRATED CIRCUIT
    4.
    发明申请
    LOGIC INTEGRATED CIRCUIT 审中-公开

    公开(公告)号：US20200266822A1

    公开(公告)日：2020-08-20

    申请号：US16648820

    申请日：2018-09-14

    Applicant: NEC Corporation

    Inventor： Yukihide TSUJI ,  Toshitsugu SAKAMOTO ,  Makoto MIYAMURA ,  Ryusuke NEBASHI ,  Ayuka TADA ,  Xu BAI

    IPC: H03K19/185 ,  H03K19/173 ,  H03K19/17704 ,  G11C13/00 ,  H01L27/24 ,  H01L45/00 ,  H03K19/17728 ,  H03K19/17756 ,  G06F7/57

    Abstract: This logic integrated circuit has a plurality of first switch cells including variable resistance elements and a plurality of second switch cells including variable resistance elements. The logic integrated circuit comprises: a first output port and a second output port; the plurality of first switch cells for switching the electrical connections between a first wire and a third wire; the plurality of second switch cells for switching the electrical connections between a second wire and the third wire; a first control transistor which is connected to the first wire and which is for switching the electrical connections between the first wire and a first power line supplying power to the first wire; and a second control transistor which is connected to the second wire and which is for switching the electrical connections between the second wire and the first power line supplying power to the second wire.

    CROSSBAR SWITCH TYPE MEMORY CIRCUIT, LOOK-UP TABLE CIRCUIT, AND PROGRAMMING METHOD
    7.
    发明申请
    CROSSBAR SWITCH TYPE MEMORY CIRCUIT, LOOK-UP TABLE CIRCUIT, AND PROGRAMMING METHOD 审中-公开

    公开(公告)号：US20180096724A1

    公开(公告)日：2018-04-05

    申请号：US15550463

    申请日：2016-03-01

    Applicant: NEC Corporation

    Inventor： Makoto MIYAMURA ,  Noboru SAKIMURA ,  Yukihide TSUJI ,  Ryusuke NEBASHI ,  Tadahiko SUGIBAYASHI

    IPC: G11C13/00 ,  H01L27/24

    CPC classification number: G11C13/004 ,  G06F7/00 ,  G06F7/544 ,  G11C13/0002 ,  G11C13/003 ,  G11C13/0064 ,  G11C13/0069 ,  G11C29/12015 ,  G11C29/50008 ,  G11C29/52 ,  G11C2013/0073 ,  G11C2029/5004 ,  G11C2213/75 ,  H01L27/2445 ,  H01L27/2481

    Abstract: In order to provide a crossbar switch type memory circuit designed to be usable in normal circumstances even when a resistance change element is in an adverse state, the present invention is provided with: a first unit including a first column wiring to which one end of a first resistance change element is connected, a first power supply-side transistor for controlling the connection of the first column wiring and a power supply node, a first ground-side transistor, of a reverse operation type to the first power supply-side transistor, for controlling the connection of the first column wiring and a ground node, and a first polarity control line for causing the first power supply-side transistor or the first ground-side transistor to turn on and the other to turn off by a polar signal from a polar signal terminal, the first polarity control line being connected to the control terminals of the first power supply-side transistor and first ground-side transistor; a second unit including a second column wiring to which one end of a second resistance change element is connected, a second power supply-side transistor, of the same operation type as the first power supply-side transistor, for controlling the connection of the second column wiring and the power supply node, a second ground-side transistor, of a reverse operation type to the second power supply-side transistor, for controlling the connection of the second column wiring and the ground node, a logic inversion circuit for inverting the polarity of the polar signal from the polar signal terminal and outputting the polarity-inverted signal, and a second polarity control line for causing the second power supply-side transistor or the second ground-side transistor to turn on and the other to turn off by a polar signal from the logic inversion circuit, the second polarity control line being connected to the control terminals of the second power supply-side transistor and second ground-side transistor; and n row wirings (n: positive integer) to which the other ends of the first and second resistance change elements are connected.

    BINARY-TO-TERNARY CONVERTER USING A COMPLEMENTARY RESISTIVE SWITCH
    8.
    发明申请
    BINARY-TO-TERNARY CONVERTER USING A COMPLEMENTARY RESISTIVE SWITCH 有权

    公开(公告)号：US20210020238A1

    公开(公告)日：2021-01-21

    申请号：US16980211

    申请日：2018-03-23

    Applicant: NEC Corporation

    Inventor： Xu BAI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Makoto MIYAMURA ,  Ryusuke NEBASHI ,  Ayuka TADA

    IPC: G11C13/00 ,  H03M5/02 ,  H03K19/1776

    Abstract: A reconfigurable circuit includes: a complementary resistive switch including a first resistive switch, a second resistive switch and a selection transistor, wherein a first terminal of the first resistive switch is connected to a first terminal of the second resistive switch and connected to a first terminal of the selection transistor; a first current source having a first terminal connected to a second terminal of the first resistive switch and a second terminal connected to a ground voltage line; a second current source having a first terminal connected to a second terminal of the second resistive switch and a second terminal connected to the ground voltage line; and a resistor having a first terminal connected to a second terminal of the selection transistor and a second terminal connected to a power voltage line.

    RECONFIGURABLE CIRCUIT AND THE METHOD FOR USING THE SAME
    9.
    发明申请
    RECONFIGURABLE CIRCUIT AND THE METHOD FOR USING THE SAME 审中-公开

    公开(公告)号：US20200295764A1

    公开(公告)日：2020-09-17

    申请号：US16083965

    申请日：2017-04-06

    Applicant: NEC Corporation

    Inventor： Xu BAI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Makoto MIYAMURA ,  Ayuka TADA ,  Ryusuke NEBASHI

    IPC: H03K19/17736 ,  H03K19/17796 ,  H03K19/17704 ,  H03K19/17784 ,  H03K19/173

    Abstract: A reconfigurable circuit includes: a first line; a first switch element disposed between the first line and a first power source line of first voltage; a second line; a second switch element disposed between the second line and a second power source line of second voltage which is different from the first voltage; and a resistive switch assembly disposed between the first line and the second line. The resistive switch assembly includes: a first non-volatile resistive switch; and a second non-volatile resistive switch whose first end is coupled to a first end of the first non-volatile resistive switch. The second end of the first non-volatile resistive switch is coupled to the first line, and the second end of the second non-volatile resistive switch is coupled to the second line.

    SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD THEREFOR
    10.
    发明申请
    SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD THEREFOR 审中-公开

    公开(公告)号：US20190180818A1

    公开(公告)日：2019-06-13

    申请号：US16324782

    申请日：2017-09-11

    Applicant: NEC Corporation

    Inventor： Makoto MIYAMURA ,  Ryusuke NEBASHI ,  Toshitsugu SAKAMOTO ,  Yukihide TSUJI ,  Xu BAI ,  Ayuka TADA

    IPC: G11C13/00

    Abstract: In order to provide a highly reliable crossbar circuit that enables salvation of reversal of a resistive state of a variable resistance element, the semiconductor device has a configuration obtained by parallelly arranging two unit elements, each including variable-resistance two-terminal elements connected in series, the semiconductor device being provided with: a unit element group being connected to a first wiring and a second wiring; a first programming driver that changes, via the first wiring, a resistive state of the two-terminal element constituting the unit element group; a first selection transistor being connected to the first wiring and the first programming driver; a second programming driver that changes, via the second wiring, a resistive state of the two-terminal element constituting the unit element group; and a second selection transistor being connected to the second wiring and the second programming driver.

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