公开(公告)号：US20220405211A1

公开(公告)日：2022-12-22

申请号：US17820870

申请日：2022-08-18

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. DULUK, Jr. ,  Cameron BUSCHARDT ,  Sherry CHEUNG ,  James Leroy DEMING ,  Samuel H. DUNCAN ,  Lucien DUNNING ,  Robert GEORGE ,  Arvind GOPALAKRISHNAN ,  Mark HAIRGROVE ,  Chenghuan JIA ,  Josh MASHEY

IPC: G06F12/1009 ,  G06F12/109 ,  G06F12/1072 ,  G06F12/08 ,  G06F11/07 ,  G06F12/12

Abstract: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US20170286198A9

公开(公告)日：2017-10-05

申请号：US14055345

申请日：2013-10-16

Applicant: NVIDIA Corporation

Inventor： Jerome F. DULUK, JR. ,  Cameron BUSCHARDT ,  Sherry CHEUNG ,  James Leroy DEMING ,  Samuel H. DUNCAN ,  Lucien DUNNING ,  Robert GEORGE ,  Arvind GOPALAKRISHNAN ,  Mark HAIRGROVE ,  Chenghuan JIA ,  John MASHEY

IPC: G06F11/07 ,  G06F12/12

CPC classification number: G06F12/1009 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1072 ,  G06F12/109 ,  G06F12/12 ,  G06F2212/1016

Abstract: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US20170249254A9

公开(公告)日：2017-08-31

申请号：US14055367

申请日：2013-10-16

Applicant: NVIDIA Corporation

Inventor： Jerome F. DULUK, JR. ,  Cameron BUSCHARDT ,  Sherry CHEUNG ,  James Leroy DEMING ,  Samuel H. DUNCAN ,  Lucien DUNNING ,  Robert GEORGE ,  Arvind GOPALAKRISHNAN ,  Mark HAIRGROVE ,  Chenghuan JIA ,  John MASHEY

IPC: G06F12/10

CPC classification number: G06F12/1009 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1072 ,  G06F12/109 ,  G06F12/12 ,  G06F2212/1016

Abstract: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US20170235491A1

公开(公告)日：2017-08-17

申请号：US15583920

申请日：2017-05-01

Applicant: NVIDIA Corporation

Inventor： Jerome F. DULUK ,  John MASHEY ,  Mark HAIRGROVE ,  Chenghuan JIA ,  Cameron BUSCHARDT ,  Lucien DUNNING ,  Brian FAHS

IPC: G06F3/06 ,  G06F13/40 ,  G06F13/42 ,  G06F12/1009

CPC classification number: G06F3/0604 ,  G06F3/0647 ,  G06F3/0664 ,  G06F12/0804 ,  G06F12/1009 ,  G06F13/4022 ,  G06F13/4282 ,  G06F2212/657

Abstract: Techniques are provided by which memory pages may be migrated among PPU memories in a multi-PPU system. According to the techniques, a UVM driver determines that a particular memory page should change ownership state and/or be migrated between one PPU memory and another PPU memory. In response to this determination, the UVM driver initiates a peer transition sequence to cause the ownership state and/or location of the memory page to change. Various peer transition sequences involve modifying mappings for one or more PPU, and copying a memory page from one PPU memory to another PPU memory. Several steps in peer transition sequences may be performed in parallel for increased processing speed.

公开(公告)号：US20170185526A9

公开(公告)日：2017-06-29

申请号：US14055382

申请日：2013-10-16

Applicant: NVIDIA Corporation

Inventor： Jerome F. DULUK, JR. ,  Cameron BUSCHARDT ,  Sherry CHEUNG ,  James Leroy DEMING ,  Samuel H. DUNCAN ,  Lucien DUNNING ,  Robert GEORGE ,  Arvind GOPALAKRISHNAN ,  Mark HAIRGROVE ,  Chenghuan JIA ,  John MASHEY

IPC: G06F12/10

CPC classification number: G06F12/1009 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1072 ,  G06F12/109 ,  G06F12/12 ,  G06F2212/1016

Abstract: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

公开(公告)号：US20140281324A1

公开(公告)日：2014-09-18

申请号：US14134142

申请日：2013-12-19

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. DULUK, JR. ,  Cameron BUSCHARDT ,  James Leroy DEMING ,  Lucien DUNNING ,  Brian FAHS ,  Mark HAIRGROVE ,  Chenghuan JIA ,  John MASHEY ,  James M. VAN DYKE

IPC: G06F3/06

CPC classification number: G06F3/0647 ,  G06F3/061 ,  G06F3/0655 ,  G06F3/0683 ,  G06F12/08 ,  G06F12/1009 ,  G06F12/122 ,  G06F2212/652

Abstract: One embodiment of the present invention sets forth a computer-implemented method for migrating a memory page from a first memory to a second memory. The method includes determining a first page size supported by the first memory. The method also includes determining a second page size supported by the second memory. The method further includes determining a use history of the memory page based on an entry in a page state directory associated with the memory page. The method also includes migrating the memory page between the first memory and the second memory based on the first page size, the second page size, and the use history.

Abstract translation: 本发明的一个实施例提出了一种用于将存储器页从第一存储器迁移到第二存储器的计算机实现的方法。 该方法包括确定由第一存储器支持的第一页大小。 该方法还包括确定由第二存储器支持的第二页大小。 该方法还包括基于与存储器页相关联的页面状态目录中的条目来确定存储器页面的使用历史。 该方法还包括基于第一页面大小，第二页面大小和使用历史来在第一存储器和第二存储器之间迁移存储器页面。