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    MANAGING MEMORY REGIONS TO SUPPORT SPARSE MAPPINGS
    5.
    发明申请
    MANAGING MEMORY REGIONS TO SUPPORT SPARSE MAPPINGS 有权
    管理存储区域来支持SPARSE映射

    公开(公告)号：US20150097847A1

    公开(公告)日：2015-04-09

    申请号：US14046064

    申请日：2013-10-04

    Applicant: NVIDIA CORPORATION

    Inventor： Jonathan DUNAISKY ,  Henry Packard MORETON ,  Jeffrey A. BOLZ ,  Yury Y. URALSKY ,  James Leroy DEMING ,  Rui M. BASTOS ,  Patrick R. BROWN ,  Amanpreet GREWAL ,  Christian AMSINCK ,  Poornachandra RAO ,  Jerome F. DULUK, JR. ,  Andrew J. TAO

    IPC: G09G5/39 ,  G06T1/60

    CPC classification number: G09G5/39 ,  G06F12/0897 ,  G06F12/1027 ,  G06T1/60

    Abstract: One embodiment of the present invention includes a memory management unit (MMU) that is configured to manage sparse mappings. The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that the PTE does not include a mapping from a virtual address to a physical address, then the MMU responds to the request based on the sparse status. If the sparse status is active, then the MMU determines the physical address based on whether the type of the request is a write operation and, subsequently, generates an acknowledgement of the request. By contrast, if the sparse status is not active, then the MMU generates a page fault. Advantageously, the disclosed embodiments enable the computer system to manage sparse mappings without incurring the performance degradation associated with both page faults and conventional software-based sparse mapping management.

    Abstract translation: 本发明的一个实施例包括被配置为管理稀疏映射的存储器管理单元（MMU）。 MMU根据指示稀疏状态的页表项（PTE）处理将虚拟地址转换为物理地址的请求。 如果MMU确定PTE不包括从虚拟地址到物理地址的映射，则MMU将根据稀疏状态对该请求进行响应。 如果稀疏状态为活动状态，则MMU将根据请求的类型是否为写入操作确定物理地址，然后生成请求的确认。 相比之下，如果稀疏状态不活动，则MMU会生成页面错误。 有利地，所公开的实施例使得计算机系统能够管理稀疏映射，而不会引起与页面故障和常规的基于软件的稀疏映射管理相关联的性能下降。

    TECHNIQUES FOR SUPPORTING FOR DEMAND PAGING
    7.
    发明申请
    TECHNIQUES FOR SUPPORTING FOR DEMAND PAGING 审中-公开
    支持需求的技术

    公开(公告)号：US20150082001A1

    公开(公告)日：2015-03-19

    申请号：US14026806

    申请日：2013-09-13

    Applicant: NVIDIA CORPORATION

    Inventor： Samuel H. DUNCAN ,  Jerome F. DULUK, JR. ,  Jonathon Stuart Ramsay EVANS ,  James Leroy DEMING

    IPC: G06F12/10

    CPC classification number: G06F12/1009

    Abstract: One embodiment of the present invention includes techniques to support demand paging across a processing unit. Before a host unit transmits a command to an engine that does not tolerate page faults, the host unit ensures that the virtual memory addresses associated with the command are appropriately mapped to physical memory addresses. In particular, if the virtual memory addresses are not appropriately mapped, then the processing unit performs actions to map the virtual memory address to appropriate locations in physical memory. Further, the processing unit ensures that the access permissions required for successful execution of the command are established. Because the virtual memory address mappings associated with the command are valid when the engine receives the command, the engine does not encounter page faults upon executing the command. Consequently, in contrast to prior-art techniques, the engine supports demand paging regardless of whether the engine is involved in remedying page faults.

    Abstract translation: 本发明的一个实施例包括支持跨越处理单元的请求寻呼的技术。 在主机单元向不容忍页面故障的引擎发送命令之前，主机单元确保与命令相关联的虚拟存储器地址被适当地映射到物理存储器地址。 特别地，如果虚拟存储器地址未被适当映射，则处理单元执行将虚拟存储器地址映射到物理存储器中适当位置的动作。 此外，处理单元确保成功执行命令所需的访问许可证被建立。 由于与引擎相关联的虚拟内存地址映射在引擎收到命令时有效，因此在执行命令时引擎不会遇到页面错误。 因此，与现有技术相反，发动机支持需求寻呼，而不管发动机是否涉及补救页面故障。

    MICROCONTROLLER FOR MEMORY MANAGEMENT UNIT
    8.
    发明申请
    MICROCONTROLLER FOR MEMORY MANAGEMENT UNIT 审中-公开

    公开(公告)号：US20140281364A1

    公开(公告)日：2014-09-18

    申请号：US14011643

    申请日：2013-08-27

    Applicant: NVIDIA CORPORATION

    Inventor： Cameron BUSCHARDT ,  Jerome F. DULUK, JR. ,  John MASHEY ,  Mark HAIRGROVE ,  James Leroy DEMING ,  Brian FAHS

    IPC: G06F12/10

    CPC classification number: G06F12/1009 ,  G06F2212/301

    Abstract: One embodiment of the present invention includes a microcontroller coupled to a memory management unit (MMU). The MMU is coupled to a page table included in a physical memory, and the microcontroller is configured to perform one or more virtual memory operations associated with the physical memory and the page table. In operation, the microcontroller receives a page fault generated by the MMU in response to an invalid memory access via a virtual memory address. To remedy such a page fault, the microcontroller performs actions to map the virtual memory address to an appropriate location in the physical memory. By contrast, in prior-art systems, a fault handler would typically remedy the page fault. Advantageously, because the microcontroller executes these tasks locally with respect to the MMU and the physical memory, latency associated with remedying page faults may be decreased. Consequently, overall system performance may be increased.

    FAULT BUFFER FOR TRACKING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM
    9.
    发明申请
    FAULT BUFFER FOR TRACKING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM 审中-公开
    用于跟踪统一的虚拟内存系统中的页面故障的故障缓冲区

    公开(公告)号：US20140281296A1

    公开(公告)日：2014-09-18

    申请号：US14055345

    申请日：2013-10-16

    Applicant: NVIDIA Corporation

    Inventor： Jerome F. DULUK, JR. ,  Cameron BUSCHARDT ,  Sherry CHEUNG ,  James Leroy DEMING ,  Samuel H. DUNCAN ,  Lucien DUNNING ,  Robert GEORGE ,  Arvind GOPALAKRISHNAN ,  Mark HAIRGROVE ,  Chenghuan JIA ,  John MASHEY

    IPC: G06F11/07 ,  G06F12/12

    CPC classification number: G06F12/1009 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1072 ,  G06F12/109 ,  G06F12/12 ,  G06F2212/1016

    Abstract: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

    Abstract translation: 用于管理虚拟内存的系统。 该系统包括被配置为执行引用第一虚拟存储器地址的第一操作的第一处理单元。 该系统还包括与第一处理单元相关联的第一存储器管理单元（MMU），并且被配置为在确定存储在与第一处理单元相关联的第一存储器单元中的第一页表不包括第一页表时，产生第一页错误 对应于第一虚拟存储器地址的映射。 该系统还包括与第一处理单元相关联的第一复制引擎。 第一复制引擎被配置为读取第一命令队列以确定与第一虚拟存储器地址相对应并且被包括在第一页状态目录中的第一映射。 第一复制引擎还被配置为更新第一页表以包括第一映射。

    PAGE STATE DIRECTORY FOR MANAGING UNIFIED VIRTUAL MEMORY
    10.
    发明申请
    PAGE STATE DIRECTORY FOR MANAGING UNIFIED VIRTUAL MEMORY 有权
    用于管理统一的虚拟内存的页面状态目录

    公开(公告)号：US20140281255A1

    公开(公告)日：2014-09-18

    申请号：US14055318

    申请日：2013-10-16

    Applicant: NVIDIA Corporation

    Inventor： Jerome F. DULUK, JR. ,  Cameron BUSCHARDT ,  Sherry CHEUNG ,  James Leroy DEMING ,  Samuel H. DUNCAN ,  Lucien DUNNING ,  Robert GEORGE ,  Arvind GOPALAKRISHNAN ,  Mark HAIRGROVE ,  Chenghuan JIA ,  John MASHEY

    IPC: G06F12/10

    CPC classification number: G06F12/1009 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1072 ,  G06F12/109 ,  G06F12/12 ,  G06F2212/1016

    Abstract: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

    Abstract translation: 用于管理虚拟内存的系统。 该系统包括被配置为执行引用第一虚拟存储器地址的第一操作的第一处理单元。 该系统还包括与第一处理单元相关联的第一存储器管理单元（MMU），并且被配置为在确定存储在与第一处理单元相关联的第一存储器单元中的第一页表不包括第一页表时，生成第一页错误 对应于第一虚拟存储器地址的映射。 该系统还包括与第一处理单元相关联的第一复制引擎。 第一复制引擎被配置为读取第一命令队列以确定与第一虚拟存储器地址相对应并且被包括在第一页状态目录中的第一映射。 第一复制引擎还被配置为更新第一页表以包括第一映射。

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