公开(公告)号：US20230215937A1

公开(公告)日：2023-07-06

申请号：US17646716

申请日：2021-12-31

Applicant: NXP B.V.

Inventor： Johannes Josephus Theodorus Marinus Donkers ,  Petrus Hubertus Cornelis Magnee ,  Ronald Willem Arnoud Werkman

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/66 ,  H01L27/06

CPC classification number: H01L29/737 ,  H01L29/0821 ,  H01L29/66242 ,  H01L27/0623

Abstract: A semiconductor device and fabrication method are described for manufacturing a heterojunction bipolar transistor by forming a silicon collector region in a substrate which includes a lower collector layer, a dopant diffusion barrier layer, and an upper collector layer, where the formation of the dopant diffusion barrier layer reduces diffusion of dopants from the lower collector layer into the upper collector layer during one or more subsequent manufacturing steps which are used to form a trench isolation region in the substrate along with a heterogeneous base region and a silicon emitter region.

公开(公告)号：US10784257B2

公开(公告)日：2020-09-22

申请号：US16120098

申请日：2018-08-31

Applicant: NXP B.V.

Inventor： Petrus Hubertus Cornelis Magnee ,  Pieter Simon van Dijk ,  Johannes Josephus Theodorus Marinus Donkers ,  Dolphin Abessolo Bidzo

IPC: H01L27/082 ,  H01L21/02 ,  H01L21/225 ,  H01L21/266 ,  H01L21/306 ,  H01L21/324 ,  H01L21/8222 ,  H01L21/8249 ,  H01L27/02 ,  H01L27/06 ,  H01L29/04 ,  H01L29/165 ,  H01L29/66 ,  H01L29/732 ,  H01L29/737

Abstract: This specification discloses methods for integrating a SiGe-based HBT (heterojunction bipolar transistor) and a Si-based BJT (bipolar junction transistor) together in a single manufacturing process that does not add a lot of process complexity, and an integrated circuit that can be fabricated utilizing such a streamlined manufacturing process. In some embodiments, such an integrated circuit can enjoy both the benefits of a higher RF (radio frequency) performance for the SiGe HBT and a lower leakage current for the Si-based BJT. In some embodiments, such an integrated circuit can be applied to an ESD (electrostatic discharge) clamp circuit, in order to achieve a lower, or no, yield-loss.

公开(公告)号：US20190019867A1

公开(公告)日：2019-01-17

申请号：US16002841

申请日：2018-06-07

Applicant: NXP B.V.

Inventor： Mahmoud Shehab Mohammad Al-Sa'di ,  Petrus Hubertus Cornelis Magnee ,  Ihor Brunets ,  Jan Willem Slotboom ,  Tony Vanhoucke

IPC: H01L29/10 ,  H01L21/8234 ,  H01L21/762 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08

Abstract: A semiconductor switch device and a method of making the same. The device includes a semiconductor substrate having a major surface. The device also includes a first semiconductor region located in the substrate beneath the major surface. The device includes an elongate gate located on the major surface. The device also includes a source region and a drain region located in the first semiconductor region adjacent respective first and second elongate edges of the gate. The device also includes electrical contacts for the source and drain regions. The contacts include at least two contacts located on either the source region or the drain region, which are spaced apart along a direction substantially parallel the elongate edges of the gate. The device further includes an isolation region located between the at least two contacts. The isolation region extends through the source/drain region from the major surface to the first semiconductor region.

公开(公告)号：US20180218906A1

公开(公告)日：2018-08-02

申请号：US15886265

申请日：2018-02-01

Applicant: NXP B.V.

Inventor： Mahmoud Shehab Mohammad Al-Sa'di ,  Petrus Hubertus Cornelis Magnee ,  Johannes Josephus Theodorus Marinus Donkers

IPC: H01L21/22 ,  H01L21/28 ,  H01L21/027

CPC classification number: H01L21/22 ,  H01L21/027 ,  H01L21/266 ,  H01L21/28158 ,  H01L29/1041 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method of making a semiconductor switch device. The method includes providing a semiconductor substrate having a major surface and a first semiconductor region having a first conductivity type located adjacent the major surface. The method also includes depositing a gate dielectric on the major surface. The method further includes implanting ions into the first semiconductor region through a mask positioned over the first semiconductor region, thereby to form a well region located in the first semiconductor region. The well region has a second conductivity type different to the first conductivity type. The method also includes depositing and patterning a gate electrode material on the gate dielectric to form a gate electrode located directly above the well region. The method further includes implanting ions into the first semiconductor region to form a source region and a drain region of the semiconductor switch device on either side of the gate electrode.

公开(公告)号：US09905679B2

公开(公告)日：2018-02-27

申请号：US14988441

申请日：2016-01-05

Applicant: NXP B.V.

Inventor： Petrus Hubertus Cornelis Magnee ,  Joost Melai ,  Viet Thanh Dinh ,  Tony Vanhoucke

IPC: H01L29/732 ,  H01L29/737 ,  H01L29/423 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/66 ,  H03F3/21

CPC classification number: H01L29/7378 ,  H01L29/063 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/423 ,  H01L29/66242 ,  H01L29/732 ,  H01L29/7371 ,  H03F3/21

Abstract: A semiconductor device comprising a bipolar transistor and a method of making the same. The bipolar transistor includes a collector having a laterally extending drift region. The bipolar transistor also includes a base located above the collector. The bipolar transistor further includes an emitter located above the base. The bipolar transistor also includes a reduced surface field (RESURF) gate located above an upper surface of the laterally extending drift region for shaping an electric field within the collector. The bipolar transistor further includes a gap located between the reduced surface field gate and an extrinsic region of the base of the device, for electrically isolating the reduced surface field gate from the base. A lateral dimension Lgap of the gap is in the range 0.1 μm≦Lgap≦1.0 μm.

公开(公告)号：US20170221994A1

公开(公告)日：2017-08-03

申请号：US15396558

申请日：2016-12-31

Applicant: NXP B.V.

Inventor： Mahmoud Shehab Mohammad Al-Sa'di ,  Johannes Josephus Theodorus Marinus Donkers ,  Petrus Hubertus Cornelis Magnee ,  Ihor Brunets ,  Anurag Vohra ,  Jan Willem Slotboom

IPC: H01L29/10 ,  H01L29/06 ,  H01L29/78 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/1095 ,  H01L21/823437 ,  H01L27/0222 ,  H01L27/088 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/66568 ,  H01L29/78

Abstract: A semiconductor switch device for switching an RF signal and a method of making the same. The device includes a first semiconductor region having a first conductivity type. The device also includes a source region and a drain region located in the first semiconductor region. The source region and the drain region have a second conductivity type. The second conductivity type is different to the first conductivity type. The device further includes a gate separating the source region from the drain region. The device also includes at least one sinker region having the second conductivity type. Each sinker region is connectable to an external potential for drawing minority carriers away from the source and drain regions to reduce a leakage current at junctions between the source and drain regions and the first semiconductor region.

公开(公告)号：US09111987B2

公开(公告)日：2015-08-18

申请号：US14259550

申请日：2014-04-23

Applicant: NXP B.V.

Inventor： Evelyne Gridelet ,  Johannes Donkers ,  Petrus Hubertus Cornelis Magnee ,  Viet Dinh ,  Tony Vanhoucke

IPC: H01L21/331 ,  H01L27/082 ,  H01L29/70 ,  H01L29/732 ,  H01L29/40 ,  H01L29/66 ,  H01L29/737

CPC classification number: H01L29/732 ,  H01L29/407 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/7378

Abstract: Consistent with an example embodiment, a bipolar transistor comprises an emitter region vertically separated from a collector region in a substrate by a base region. The bipolar transistor further comprises a field plate electrically connected to the emitter region; the field plate extends from the emitter region along the base region into the collector region and the field plate is laterally electrically insulated from the base region and the collector region by a spacer. The spacer comprises an electrically isolating material that includes a silicon nitride layer and is vertically electrically isolated from the substrate by a further electrically isolating material.

Abstract translation: 与示例实施例一致，双极晶体管包括通过基极区域与衬底中的集电极区域垂直分离的发射极区域。 双极晶体管还包括电连接到发射极区的场板; 场板沿着基极区域从发射极区域延伸到集电极区域，并且场板通过间隔物与基极区域和集电极区域横向电绝缘。 间隔物包括电绝缘材料，其包括氮化硅层，并通过另外的电绝缘材料与衬底垂直电隔离。

公开(公告)号：US11901414B2

公开(公告)日：2024-02-13

申请号：US17447018

申请日：2021-09-07

Applicant: NXP B.V.

Inventor： Ljubo Radic ,  Viet Thanh Dinh ,  Petrus Hubertus Cornelis Magnee

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/737

CPC classification number: H01L29/1004 ,  H01L29/0821 ,  H01L29/7375

Abstract: A semiconductor device includes a semiconductor substrate, a first semiconductor region of a first semiconductor type, formed within the semiconductor substrate, wherein the first semiconductor region includes a first doped region formed in a lower portion of the first semiconductor region and a second doped region formed over the first doped region in an upper portion of the first semiconductor region. A defect layer having an upper surface formed in an upper portion of the first doped region. A second semiconductor region of a second semiconductor type is formed over the first semiconductor region.

公开(公告)号：US20230081675A1

公开(公告)日：2023-03-16

申请号：US17447018

申请日：2021-09-07

Applicant: NXP B.V.

Inventor： Ljubo Radic ,  Viet Thanh Dinh ,  Petrus Hubertus Cornelis Magnee

IPC: H01L29/10 ,  H01L29/737 ,  H01L29/08

Abstract: A semiconductor device includes a semiconductor substrate, a first semiconductor region of a first semiconductor type, formed within the semiconductor substrate, wherein the first semiconductor region includes a first doped region formed in a lower portion of the first semiconductor region and a second doped region formed over the first doped region in an upper portion of the first semiconductor region. A defect layer having an upper surface formed in an upper portion of the first doped region. A second semiconductor region of a second semiconductor type is formed over the first semiconductor region.

公开(公告)号：US10825900B2

公开(公告)日：2020-11-03

申请号：US16002841

申请日：2018-06-07

Applicant: NXP B.V.

Inventor： Mahmoud Shehab Mohammad Al-Sa'di ,  Petrus Hubertus Cornelis Magnee ,  Ihor Brunets ,  Jan Willem Slotboom ,  Tony Vanhoucke

IPC: H01L29/10 ,  H01L29/06 ,  H01L29/78 ,  H01L29/417 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/08

Abstract: A semiconductor switch device and a method of making the same. The device includes a semiconductor substrate having a major surface. The device also includes a first semiconductor region located in the substrate beneath the major surface. The device includes an elongate gate located on the major surface. The device also includes a source region and a drain region located in the first semiconductor region adjacent respective first and second elongate edges of the gate. The device also includes electrical contacts for the source and drain regions. The contacts include at least two contacts located on either the source region or the drain region, which are spaced apart along a direction substantially parallel the elongate edges of the gate. The device further includes an isolation region located between the at least two contacts. The isolation region extends through the source/drain region from the major surface to the first semiconductor region.