Manufacturing method of a semiconductor device with a trench capacitor
    12.
    发明授权
    Manufacturing method of a semiconductor device with a trench capacitor 失效
    具有沟槽电容器的半导体器件的制造方法

    公开(公告)号:US5302541A

    公开(公告)日:1994-04-12

    申请号:US17904

    申请日:1993-02-16

    申请人: Moriaki Akazawa

    发明人: Moriaki Akazawa

    CPC分类号: H01L27/10864 H01L27/10841

    摘要: A semiconductor device includes a second insulator layer (12) a first conductor layer (13) and a second insulator layer (14) stacked in this order on a semiconductor substrate (11), and a trench (15) formed to penetrate the stacked triple layer and extend into the semiconductor substrate. A capacitor is formed at a portion of the trench located in the semiconductor substrate. A transistor is formed directly on this capacitor. The capacitor has one electrode formed of the semiconductor substrate and the other electrode formed of a second conductor layer (18) formed in the trench to open a dielectric film (17). The transistor includes a gate electrode formed of the first conductor layer and source/drain regions (20, 21) of a second conductivity type distributed in the vicinity of the first and second insulator layers in an active layer (19) filling the trench. The drain and source regions of the transistor are formed by thermally diffusing impurities included in the first and second insulator layers into the active layer. Since a region to be added only for isolation is unnecessary in this semiconductor device and a manufacture method thereof, a memory cell area can be reduced, resulting in higher integration of the device.

    摘要翻译: 半导体器件包括在半导体衬底(11)上依次堆叠的第二绝缘体层(12),第一导体层(13)和第二绝缘体层(14),以及形成为穿透叠置的三层 并延伸到半导体衬底中。 在位于半导体衬底中的沟槽的一部分处形成电容器。 晶体管直接形成在该电容器上。 电容器具有由半导体衬底形成的一个电极,而另一个电极由形成在沟槽中的第二导体层(18)形成以打开电介质膜(17)。 晶体管包括由填充沟槽的有源层(19)中分散在第一和第二绝缘体层附近的第二导电类型的源极/漏极区(20,21)形成的栅电极和源/漏区(20,21)。 晶体管的漏极和源极区域通过将包括在第一和第二绝缘体层中的杂质热扩散到有源层中而形成。 由于在该半导体器件中不需要添加用于隔离的区域及其制造方法,因此可以减小存储单元面积,导致器件的集成化。

    Vacuum-treatment apparatus
    13.
    发明授权
    Vacuum-treatment apparatus 失效
    真空处理设备

    公开(公告)号:US5203981A

    公开(公告)日:1993-04-20

    申请号:US835331

    申请日:1992-02-14

    申请人: Moriaki Akazawa

    发明人: Moriaki Akazawa

    摘要: A vacuum-treatment apparatus employs a magnetically driven clamp which uses repulsive and attractive forces between magnets. The clamp mechanism is simplified, maintenance of the apparatus can be easily performed, and the surfaces which mechanically contact one another are decreased as much as possible so that a vacuum-treatment apparatus which generates less dust is obtained.

    摘要翻译: 真空处理装置采用磁力驱动的夹具,其在磁体之间使用排斥力和吸引力。 夹紧机构简化,可以容易地进行设备的维护,并且尽可能地减少机械接触的表面,从而获得产生较少灰尘的真空处理设备。

    Semiconductor device and manufacturing method thereof
    14.
    发明授权
    Semiconductor device and manufacturing method thereof 失效
    半导体装置及其制造方法

    公开(公告)号:US5218218A

    公开(公告)日:1993-06-08

    申请号:US895158

    申请日:1992-06-05

    申请人: Moriaki Akazawa

    发明人: Moriaki Akazawa

    IPC分类号: H01L21/8242 H01L27/108

    CPC分类号: H01L27/10864 H01L27/10841

    摘要: A semiconductor device includes a second insulator layer (12), a first conductor layer (13) and a second insulator layer (14) stacked in this order on a semiconductor substrate (11), and a trench (15) formed to penetrate the stacked triple layer and extend into the semiconductor substrate. A capacitor is formed at a portion of the trench located in the semiconductor substrate. A transistor is formed directly on this capacitor. The capacitor has one electrode formed of the semiconductor substrate and the other electrode formed of a second conductor layer (18) formed in the trench to open a dielectric film (17). The transistor includes a gate electrode formed of the first conductor layer and source/drain regions (20, 21) of a second conductivity type distributed in the vicinity of the first and second insulator layers in an active layer (19) filling the trench. The drain and source regions of the transistor are formed by thermally diffusing impurities included in the first and second insulator layers into the active layer. Since a region to be added only for isolation is unnecessary in this semiconductor device and a manufacture method thereof, a memory cell area can be reduced, resulting in higher integration of the device.

    摘要翻译: 半导体器件包括在半导体衬底(11)上依次堆叠的第二绝缘体层(12),第一导体层(13)和第二绝缘体层(14),以及形成为穿透层叠的沟槽 三层并延伸到半导体衬底中。 在位于半导体衬底中的沟槽的一部分处形成电容器。 晶体管直接形成在该电容器上。 电容器具有由半导体衬底形成的一个电极,而另一个电极由形成在沟槽中的第二导体层(18)形成以打开电介质膜(17)。 晶体管包括由填充沟槽的有源层(19)中分散在第一和第二绝缘体层附近的第二导电类型的源极/漏极区(20,21)形成的栅电极和源/漏区(20,21)。 晶体管的漏极和源极区域通过将包括在第一和第二绝缘体层中的杂质热扩散到有源层中而形成。 由于在该半导体器件中不需要添加用于隔离的区域及其制造方法,因此可以减小存储单元面积,导致器件的集成化。