公开(公告)号：US08476673B2

公开(公告)日：2013-07-02

申请号：US13296832

申请日：2011-11-15

申请人： Norihito Tokura ,  Satoshi Shiraki ,  Shigeki Takahashi ,  Shinya Sakurai ,  Takashi Suzuki

发明人： Norihito Tokura ,  Satoshi Shiraki ,  Shigeki Takahashi ,  Shinya Sakurai ,  Takashi Suzuki

IPC分类号： H01L29/861 ,  H01L29/747 ,  H01L31/107

CPC分类号： H01L21/76283 ,  H01L27/0814 ,  H01L27/1203 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/08 ,  H01L29/405 ,  H01L29/8611

摘要： A diode has a semiconductor layer and cathode and anode electrodes on a surface of the semiconductor layer. The semiconductor layer has cathode and anode regions respectively contacting the cathode and anode electrodes. The anode region has a first diffusion region having high surface concentration, a second diffusion region having intermediate surface concentration, and a third diffusion region having low surface concentration. The first diffusion region is covered with the second and third diffusion regions. The second diffusion region has a first side surface facing the cathode region, a second side surface opposite to the cathode region, and a bottom surface extending between the first and second side surfaces. The third diffusion region covers at least one of the first corner part connecting the first side surface with the bottom surface and the second corner part connecting the second side surface with the bottom surface.

摘要翻译： 二极管在半导体层的表面上具有半导体层和阴极和阳极电极。 半导体层具有分别与阴极和阳极电极接触的阴极和阳极区域。 阳极区域具有表面浓度高的第一扩散区域，具有中间表面浓度的第二扩散区域和具有低表面浓度的第三扩散区域。 第一扩散区被第二和第三扩散区覆盖。 第二扩散区域具有面对阴极区域的第一侧表面，与阴极区域相对的第二侧表面和在第一和第二侧表面之间延伸的底表面。 第三扩散区域覆盖连接第一侧表面与底表面的第一角部和将第二侧表面与底表面连接的第二角部中的至少一个。

公开(公告)号：US20110298446A1

公开(公告)日：2011-12-08

申请号：US13150764

申请日：2011-06-01

申请人： Satoshi SHIRAKI ,  Norihito Tokura ,  Shigeki Takahashi ,  Masahiro Yamamoto ,  Akira Yamada ,  Hiroyasu Kudo ,  Youichi Ashida ,  Akio Nakagawa

发明人： Satoshi SHIRAKI ,  Norihito Tokura ,  Shigeki Takahashi ,  Masahiro Yamamoto ,  Akira Yamada ,  Hiroyasu Kudo ,  Youichi Ashida ,  Akio Nakagawa

IPC分类号： G01R1/20 ,  H01L29/739

CPC分类号： H01L27/1203 ,  G01R19/0092 ,  H01L21/76283 ,  H01L23/585 ,  H01L29/0696 ,  H01L29/405 ,  H01L29/7394 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device having a lateral semiconductor element includes a semiconductor substrate, a first electrode on the substrate, a second electrode on the substrate, and an isolation structure located in the substrate to divide the substrate into a first island and a second island electrically insulated from the first island. The lateral semiconductor element includes a main cell located in the first island and a sense cell located in the second island. The main cell causes a first current to flow between the first electrode and the second electrode so that the first current flows in a lateral direction along the surface of the substrate. The first current is detected by detecting a second current flowing though the sense cell.

摘要翻译： 具有横向半导体元件的半导体器件包括半导体衬底，衬底上的第一电极，衬底上的第二电极和位于衬底中的隔离结构，以将衬底分成第一岛和与第一岛电绝缘的第二岛 第一个岛屿。 横向半导体元件包括位于第一岛中的主单元和位于第二岛中的感测单元。 主电池使得第一电流在第一电极和第二电极之间流动，使得第一电流沿着基板的表面在横向方向上流动。 通过检测流过感测单元的第二电流来检测第一电流。

公开(公告)号：US06384431B1

公开(公告)日：2002-05-07

申请号：US09680538

申请日：2000-10-06

申请人： Shigeki Takahashi ,  Takanori Teshima ,  Naohiko Hirano ,  Norihito Tokura

发明人： Shigeki Takahashi ,  Takanori Teshima ,  Naohiko Hirano ,  Norihito Tokura

IPC分类号： H01L2974

CPC分类号： H01L29/1095 ,  H01L29/7395

摘要： Insulated gate bipolar transistors which can restrain causing surge voltage due to an inductance component while an L-load is turned off and can improve a negative characteristic of a sustain voltage during breakdown. An insulated gate bipolar transistor (IGBT) is provided with: a p+-type semiconductor substrate; an n+-type buffer layer having high impurity concentration; an n-type intermediate layer; and an n−-type base layer having low impurity concentration. A p-type well layer and an n+-type emitter layer having high impurity concentration are formed in the n−-type base layer. The n-type intermediate layer has an intermediate impurity concentration between an impurity concentration of the n+-type buffer layer and that of the n−-type base layer. Thickness of the intermediate layer is determined so that the depletion layer does not reach the n+-type buffer layer even when the switching operation of the L-load is turned off. As a result, it can restrain causing surge voltage and can improve a negative characteristic of a sustain voltage.

摘要翻译： 绝缘栅双极晶体管，其可以抑制由于电感分量引起的浪涌电压，同时L负载关断，并且可以在击穿期间改善维持电压的负特性。 绝缘栅双极晶体管（IGBT）具有：p +型半导体衬底; 具有高杂质浓度的n +型缓冲层; n型中间层; 以及杂质浓度低的n型基底层。 在n型基底层中形成具有高杂质浓度的p型阱层和n +型发射极层。 n型中间层在n +型缓冲层的杂质浓度与n型基底层的杂质浓度之间具有中间杂质浓度。 确定中间层的厚度，即使当L负载的切换操作被关闭时，耗尽层也不会到达n +型缓冲层。 结果，能够抑制浪涌电压，能够提高维持电压的负特性。

公开(公告)号：US09240445B2

公开(公告)日：2016-01-19

申请号：US14113419

申请日：2012-05-10

申请人： Takashi Suzuki ,  Norihito Tokura ,  Satoshi Shiraki ,  Shigeki Takahashi ,  Youichi Ashida ,  Akira Yamada

发明人： Takashi Suzuki ,  Norihito Tokura ,  Satoshi Shiraki ,  Shigeki Takahashi ,  Youichi Ashida ,  Akira Yamada

IPC分类号： H01L23/62 ,  H01L29/06 ,  H01L29/40 ,  H01L29/861

CPC分类号： H01L29/063 ,  H01L29/0692 ,  H01L29/402 ,  H01L29/404 ,  H01L29/405 ,  H01L29/861

摘要： A lateral semiconductor device includes a semiconductor layer, an insulating layer, and a resistive field plate. The semiconductor layer includes a first semiconductor region and a second semiconductor region at a surface portion, and the second semiconductor region makes a circuit around the first semiconductor region. The insulating layer is formed on a surface of the semiconductor layer and is disposed between the first and second semiconductor regions. The resistive field plate is formed on a surface of the insulating layer. Between the first and second semiconductor regions, a first section and a second section are adjacent to each other along a circumferential direction around the first semiconductor region. The resistive field plate includes first and second resistive field plate sections respectively formed in the first and second sections, and the first and second resistive field plate sections are separated from each other.

摘要翻译： 横向半导体器件包括半导体层，绝缘层和电阻场板。 半导体层包括在表面部分处的第一半导体区域和第二半导体区域，并且第二半导体区域在第一半导体区域周围形成电路。 绝缘层形成在半导体层的表面上并且设置在第一和第二半导体区之间。 电阻场板形成在绝缘层的表面上。 在第一和第二半导体区域之间，第一部分和第二部分沿着围绕第一半导体区域的圆周方向彼此相邻。 电阻场板包括分别形成在第一和第二部分中的第一和第二电阻场板部分，并且第一和第二电阻场板部分彼此分离。

公开(公告)号：US06603173B1

公开(公告)日：2003-08-05

申请号：US09391236

申请日：1999-09-07

申请人： Yoshifumi Okabe ,  Yoshihiko Ozeki ,  Shigeki Takahashi ,  Norihito Tokura

发明人： Yoshifumi Okabe ,  Yoshihiko Ozeki ,  Shigeki Takahashi ,  Norihito Tokura

IPC分类号： H01L2976

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/4236

摘要： A vertical power MOSFET, which can improve a surge withstand voltage and a surge withstand voltage against a surge voltage from an inductance load L. The vertical power MOSFET has a plurality of unit cells. The unit cell is formed from a MOSFET that uses a p-type base layer at a sidewall of a rectangular U-groove as a channel portion. Each of the p-type base layer of each unit cell is connected each others Accordingly, it can restrain an impurity concentration of a corner portion (a portion positioned at a corner) of the rectangular p-type base layer from being decreased. Therefore, it can reduce the difference in distance from the end portion of the p-type base layer to the end portion of the depletion layer. As a result, it can improve the surge withstand voltage when a surge voltage is input from an inductance load L.

摘要翻译： 一种垂直功率MOSFET，其可以提高抗电压耐受电压和抵抗来自电感负载L的浪涌电压的浪涌耐受电压。垂直功率MOSFET具有多个单元电池。 单位电池由在矩形U形槽的侧壁处使用p型基底层作为沟道部分的MOSFET形成。 每个单电池的p型基极层彼此连接。因此，能够抑制矩形p型基极层的角部（位于角部的部分）的杂质浓度降低。 因此，可以减少与p型基底层的端部到耗尽层的端部的距离的差异。 因此，当从电感负载L输入浪涌电压时，可以提高浪涌耐受电压。

公开(公告)号：US20110291157A1

公开(公告)日：2011-12-01

申请号：US13114148

申请日：2011-05-24

申请人： Shigeki TAKAHASHI ,  Norihito Tokura ,  Satoshi Shiraki ,  Youichi Ashida ,  Akio Nakagawa

发明人： Shigeki TAKAHASHI ,  Norihito Tokura ,  Satoshi Shiraki ,  Youichi Ashida ,  Akio Nakagawa

IPC分类号： H01L29/739

CPC分类号： H01L29/7393 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/405 ,  H01L29/7394

摘要： A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.

摘要翻译： 横向绝缘栅双极晶体管包括包括漂移层，集电极区域，沟道层，发射极区域，栅极绝缘层，栅电极，集电极，发射极和阻挡层的半导体衬底。 阻挡层沿着集电极区域的两侧设置，并且位于比通道层的底部更深的深度。 阻挡层的杂质浓度高于漂移层的杂质浓度。 阻挡层具有靠近集电极区域的第一端和远离集电极区域的第二端。 第一端位于沟道层和集电极区之间，第二端位于沟道层的底部。

公开(公告)号：US20110073904A1

公开(公告)日：2011-03-31

申请号：US12923469

申请日：2010-09-23

申请人： Youichi Ashida ,  Norihito Tokura ,  Shigeki Takahashi ,  Yoshiaki Nakayama ,  Satoshi Shiraki ,  Kouji Senda

发明人： Youichi Ashida ,  Norihito Tokura ,  Shigeki Takahashi ,  Yoshiaki Nakayama ,  Satoshi Shiraki ,  Kouji Senda

IPC分类号： H01L29/739 ,  H01L29/06 ,  H01L29/78 ,  H01L21/762

CPC分类号： H01L27/1203 ,  H01L21/76264 ,  H01L21/84 ,  H01L29/0634 ,  H01L29/0657 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/404 ,  H01L29/405 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66128 ,  H01L29/7394 ,  H01L29/7824 ,  H01L29/8611

摘要： A semiconductor device includes: a SOI substrate; a semiconductor element having first and second impurity layers disposed in an active layer of the SOI substrate, the second impurity layer surrounding the first impurity layer; and multiple first and second conductive type regions disposed in a part of the active layer adjacent to an embedded insulation film of the SOI substrate. The first and second conductive type regions are alternately arranged. The first and second conductive type regions have a layout, which corresponds to the semiconductor element.

摘要翻译： 半导体器件包括：SOI衬底; 半导体元件，其具有设置在所述SOI衬底的有源层中的第一和第二杂质层，所述第二杂质层围绕所述第一杂质层; 以及设置在与SOI衬底的嵌入式绝缘膜相邻的有源层的一部分中的多个第一和第二导电类型区域。 交替地布置第一和第二导电类型区域。 第一和第二导电类型区域具有对应于半导体元件的布局。

公开(公告)号：US08791690B2

公开(公告)日：2014-07-29

申请号：US13150764

申请日：2011-06-01

申请人： Satoshi Shiraki ,  Norihito Tokura ,  Shigeki Takahashi ,  Masahiro Yamamoto ,  Akira Yamada ,  Hiroyasu Kudo ,  Youichi Ashida ,  Akio Nakagawa

发明人： Satoshi Shiraki ,  Norihito Tokura ,  Shigeki Takahashi ,  Masahiro Yamamoto ,  Akira Yamada ,  Hiroyasu Kudo ,  Youichi Ashida ,  Akio Nakagawa

IPC分类号： G01R1/20

摘要： A semiconductor device having a lateral semiconductor element includes a semiconductor substrate, a first electrode on the substrate, a second electrode on the substrate, and an isolation structure located in the substrate to divide the substrate into a first island and a second island electrically insulated from the first island. The lateral semiconductor element includes a main cell located in the first island and a sense cell located in the second island. The main cell causes a first current to flow between the first electrode and the second electrode so that the first current flows in a lateral direction along the surface of the substrate. The first current is detected by detecting a second current flowing though the sense cell.

公开(公告)号：US08604513B2

公开(公告)日：2013-12-10

申请号：US12923469

申请日：2010-09-23

申请人： Youichi Ashida ,  Norihito Tokura ,  Shigeki Takahashi ,  Yoshiaki Nakayama ,  Satoshi Shiraki ,  Kouji Senda

发明人： Youichi Ashida ,  Norihito Tokura ,  Shigeki Takahashi ,  Yoshiaki Nakayama ,  Satoshi Shiraki ,  Kouji Senda

IPC分类号： H01L29/66

CPC分类号： H01L27/1203 ,  H01L21/76264 ,  H01L21/84 ,  H01L29/0634 ,  H01L29/0657 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/404 ,  H01L29/405 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66128 ,  H01L29/7394 ,  H01L29/7824 ,  H01L29/8611

摘要： A semiconductor device includes: a SOI substrate; a semiconductor element having first and second impurity layers disposed in an active layer of the SOI substrate, the second impurity layer surrounding the first impurity layer; and multiple first and second conductive type regions disposed in a part of the active layer adjacent to an embedded insulation film of the SOI substrate. The first and second conductive type regions are alternately arranged. The first and second conductive type regions have a layout, which corresponds to the semiconductor element.

摘要翻译： 半导体器件包括：SOI衬底; 半导体元件，其具有设置在所述SOI衬底的有源层中的第一和第二杂质层，所述第二杂质层围绕所述第一杂质层; 以及设置在与SOI衬底的嵌入式绝缘膜相邻的有源层的一部分中的多个第一和第二导电类型区域。 交替地布置第一和第二导电类型区域。 第一和第二导电类型区域具有对应于半导体元件的布局。

公开(公告)号：US08354691B2

公开(公告)日：2013-01-15

申请号：US13226636

申请日：2011-09-07

申请人： Norihito Tokura ,  Shigeki Takahashi ,  Youichi Ashida ,  Akio Nakagawa

发明人： Norihito Tokura ,  Shigeki Takahashi ,  Youichi Ashida ,  Akio Nakagawa

IPC分类号： H01L29/739

CPC分类号： H01L29/7394 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/405 ,  H01L29/43 ,  H01L29/7397

摘要： A N-channel lateral insulated-gate bipolar transistor includes a semiconductor substrate, a drift layer, a collector region, a channel layer, an emitter region, a gate insulation film, a gate electrode, a collector electrode, an emitter electrode. The collector region includes a high impurity concentration region having a high impurity concentration and a low impurity concentration region having a lower impurity concentration than the high impurity concentration region. The collector electrode is in ohmic contact with the high impurity concentration region and in schottky contact with the low impurity concentration region.

摘要翻译： N沟道横向绝缘栅双极晶体管包括半导体衬底，漂移层，集电极区，沟道层，发射极区，栅极绝缘膜，栅电极，集电极，发射极。 集电极区域包括具有高杂质浓度的高杂质浓度区域和杂质浓度低于高杂质浓度区域的低杂质浓度区域。 集电极与高杂质浓度区域欧姆接触，与低杂质浓度区域进行肖特基接触。