-
公开(公告)号：US09098156B2
公开(公告)日：2015-08-04
申请号：US13668328
申请日：2012-11-05
发明人： Cheng-Chih Wang
IPC分类号： G06F3/044
CPC分类号： G06F3/044
摘要： A touch sensing device includes a touch sensing trace layout, a comparator and a variable capacitor unit. The touch sensing trace layout performs a sensing operation according to at least one first driving signal in a sensing state. An input of the comparator is electrically coupled to the touch sensing trace layout for receiving a sensing signal outputted by the touch sensing trace layout. The variable capacitor unit is selectively coupled to one of the inputs of the comparator, for correspondingly performing potential compensation to the sensing signal received by the input of the comparator according to at least one second driving signal.
摘要翻译： 触摸感测装置包括触摸感测迹线布局，比较器和可变电容器单元。 触摸感测迹线布局根据感测状态下的至少一个第一驱动信号执行感测操作。 比较器的输入电耦合到触摸感测迹线布局，用于接收由触摸感测迹线布局输出的感测信号。 可变电容器单元选择性地耦合到比较器的一个输入端，用于根据至少一个第二驱动信号对由比较器的输入接收到的感测信号进行电位补偿。
-
公开(公告)号：US20130234980A1
公开(公告)日：2013-09-12
申请号：US13706789
申请日：2012-12-06
发明人： Cheng-Chih Wang
CPC分类号： G06F3/041 , G06F3/0418 , G06F3/044
摘要： A touch sensing apparatus includes a touch sensing trace and a signal processing circuit. The touch sensing trace is configured to generate a sensing signal including a noise signal. A first input terminal of the signal processing circuit is configured to receive the sensing signal, and a second input terminal of the signal processing circuit is configured to receive a reference voltage signal and selectively coupled to at least one of first electrodes and second electrodes of the touch sensing trace, such that the second input terminal synchronously receives the reference voltage signal and the noise signal associated with the touch sensing trace.
摘要翻译： 触摸感测装置包括触摸感测轨迹和信号处理电路。 触摸感测轨迹被配置为产生包括噪声信号的感测信号。 信号处理电路的第一输入端被配置为接收感测信号，并且信号处理电路的第二输入端被配置为接收参考电压信号，并选择性地耦合到第一电极和第二电极中的至少一个 触摸感测迹线，使得第二输入端子同步地接收参考电压信号和与触摸感测轨迹相关联的噪声信号。
-
公开(公告)号：US20240110977A1
公开(公告)日：2024-04-04
申请号：US18473299
申请日：2023-09-25
发明人： Chih-Ping Lu , Cheng-Chih Wang
IPC分类号： G01R31/3177 , H03K3/037 , H03K5/24
CPC分类号： G01R31/3177 , H03K3/037 , H03K5/24 , H03K19/20
摘要： A comparator testing circuit and a testing method are provided. The comparator testing circuit includes a switching circuit, a comparator, and a determination circuit. The switching circuit receives a first signal, a second signal, and a switching signal, and outputs one of the first signal and the second signal as a first input signal and the other of the first signal and the second signal as a second input signal according to the switching signal. The comparator compares the first input signal with the second input signal to generate an output signal. The determination circuit determines whether the comparator is abnormal based on the switching signal and the output signal to generate an exception flag.
-
公开(公告)号：US11615049B2
公开(公告)日：2023-03-28
申请号：US17563735
申请日：2021-12-28
发明人： Cheng-Chih Wang
IPC分类号： G06F13/42
摘要： A programmable serial input-output controller is provided. A timer circuit performs a timing operation. An input pin is configured to receive an input signal from an external circuit. An output pin is configured to provide an output signal to the external circuit. In an output mode, the sequence controller provides an initial level to the output pin and controls the timer circuit to perform the timing operation. In response to a duration of the timer circuit performing the timing operation reaching first transmission time, the sequence controller inverts the level of the output pin and controls the timer circuit to re-perform the timing operation. In response to the duration of the timer circuit re-performing the timing operation reaching second transmission time, the sequence controller inverts the level of the output pin.
-
公开(公告)号：US11429222B2
公开(公告)日：2022-08-30
申请号：US17200360
申请日：2021-03-12
发明人： Cheng-Chih Wang
IPC分类号： G06F3/045 , G06F3/041 , G09G3/3216 , G06F3/044
摘要： A control circuit is provided. A first input-output pin is coupled to a display device and a capacitive touch device. A second input-output pin is coupled to the display device and a capacitive touch device. A sensing circuit determines whether the capacitive touch device is touched according to the voltages of the first and second input-output pins. A display controller provides a first driving signal to the display device via the first input-output pin and provides a second driving signal to the display device via the second input-output pin in a first display period and a second display period. From the end time point of the first display period to the start time point of the second display period, the sensing circuit detects the voltage level of the first input-output pin and stops detecting the voltage of the second input-output pin.
-
公开(公告)号：US11409346B2
公开(公告)日：2022-08-09
申请号：US16719041
申请日：2019-12-18
发明人： Jen-Lieh Lin , Chuang-Huang Kuo , Cheng-Chih Wang
摘要： A control circuit is provided. A memory is configured to store a program code. A central processing unit (CPU) executes a plurality of instructions according to the program code. When a specific instruction is executed by the CPU, the CPU generates a control signal. A power mode management circuit generates a selection signal according to the control signal. A processing circuit transforms first power data according to the selection signal. A first storage circuit stores the first power data. The processing circuit generates first set data and second set data according to first power data. A first specific device operates in a first power mode according to the first set data. A second specific device operates in a second power mode according to the second set data. The first storage circuit, the power mode management circuit and the processing circuit are in an always-on state.
-
公开(公告)号：US10073555B2
公开(公告)日：2018-09-11
申请号：US14961904
申请日：2015-12-08
发明人： Cheng-Chih Wang
CPC分类号： G06F3/0416 , G06F3/044 , H03K17/9622 , H03K2217/94026 , H03K2217/960715
摘要： A sensing device includes a comparator, a first and a second variable capacitor units. The first and second variable capacitor units charge a first and a second comparator inputs, respectively, according to a first and a second driving signals, such that the first and second comparator inputs have a first and a second voltages, respectively, in which a voltage level of the first driving signal is higher than a voltage level of the second driving signal. The comparator is configured to compare the first voltage and the second voltage to generate a comparator output signal. The first variable capacitor unit is adjusted according to the comparator output signal to perform potential compensation for the first comparator input, or the second variable capacitor unit is adjusted according to the comparator output signal to perform potential compensation for the second comparator input.
-
公开(公告)号：US09984750B2
公开(公告)日：2018-05-29
申请号：US15414643
申请日：2017-01-25
发明人： Cheng-Chih Wang
CPC分类号： G11C13/0097 , G11C13/004 , G11C13/0069 , G11C14/009 , G11C2013/0073
摘要： A non-volatile memory (NVM) device includes a logic memory circuit, a NVM element, a writing circuit and a reading circuit. The input terminal of the writing circuit and the output terminal of the reading circuit are coupled to the output terminal of the logic memory circuit. The first output terminal of the writing circuit and the first input terminal of the reading circuit are coupled to the first terminal of the NVM element. The second output terminal of the writing circuit and the second input terminal of the reading circuit are coupled to the second terminal of the NVM element. During a writing period, the writing circuit writes the stored data of the logic memory circuit into the NVM element. During a reading period, the reading circuit restores the data of the NVM element to the output terminal of the logic memory circuit.
-
公开(公告)号：US09755646B2
公开(公告)日：2017-09-05
申请号：US15011653
申请日：2016-01-31
发明人： Cheng-Chih Wang
IPC分类号： H03K3/00 , H03K19/173 , H03K19/0185
CPC分类号： H03K19/173 , G11C13/0002 , G11C14/0054 , H03K19/018507 , H03K19/018521
摘要： An input/output (I/O) buffer circuit includes an I/O unit, a first register and a second register. The I/O unit selectively transmits digital signals and analog signals according to a first enable signal, and selectively receives signals and outputs signals at an I/O terminal according to a second enable signal. The first register latches a first control signal received before power is turned off, and outputs the first enable signal corresponding to the first control signal to the I/O unit when power is turned on. The second register latches a second control signal received before power is turned off, and outputs the second enable signal corresponding to the second control signal to the I/O unit when power is turned on.
-
公开(公告)号：US09575535B2
公开(公告)日：2017-02-21
申请号：US14320663
申请日：2014-07-01
发明人： Cheng-Chih Wang
CPC分类号： G06F1/305 , G06F1/3203 , H03K17/24
摘要： An integrated circuit and an operation method thereof are provided. The integrated circuit includes a voltage detecting unit, a central processing unit, a memory unit and a control unit. The voltage detecting unit detects a system voltage and correspondingly outputs a voltage state signal. The central processing unit has at least one register. When the system voltage is downed to a voltage level lower than or equal to a brown-out voltage and greater than a reset low voltage, the control unit stores values of the registers into the memory unit.
摘要翻译： 提供了一种集成电路及其操作方法。 集成电路包括电压检测单元，中央处理单元，存储单元和控制单元。 电压检测单元检测系统电压并相应地输出电压状态信号。 中央处理单元至少有一个寄存器。 当系统电压降低到低于或等于欠压电压并大于复位低电压的电压电平时，控制单元将寄存器的值存储到存储器单元中。
-
-
-
-
-
-
-
-
-
搜索结果
49 条记录 (耗时 0.02 秒)
