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    IMAGE SENSOR WITH ENHANCED QUANTUM EFFICIENCY
    13.
    发明申请
    IMAGE SENSOR WITH ENHANCED QUANTUM EFFICIENCY 有权
    具有增强量子效率的图像传感器

    公开(公告)号：US20160227147A1

    公开(公告)日：2016-08-04

    申请号：US14612961

    申请日：2015-02-03

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Gang Chen ,  Dominic Massetti ,  Chih-Wei Hsiung ,  Arvind Kumar ,  Yuanwei Zheng ,  Duli Mao ,  Dyson H. Tai

    IPC: H04N5/3745 ,  H04N5/378

    CPC classification number: H04N9/045 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14647 ,  H04N5/37457

    Abstract: A back side illuminated image sensor includes a pixel array including semiconductor material, and image sensor circuitry disposed on a front side of the semiconductor material to control operation of the pixel array. A first pixel includes a first doped region disposed proximate to a back side of the semiconductor material and extends into the semiconductor material a first depth to reach the image sensor circuitry. A second pixel with a second doped region is disposed proximate to the back side of the semiconductor material and extends into the semiconductor material a second depth which is less than the first depth. A third doped region is disposed between the second doped region and the image sensor circuitry front side of the semiconductor material. The third doped region is electrically isolated from the first doped region and the second doped region.

    Abstract translation: 背面照明图像传感器包括包括半导体材料的像素阵列和设置在半导体材料的前侧上以控制像素阵列的操作的图像传感器电路。 第一像素包括靠近半导体材料的背面设置的第一掺杂区域，并延伸到半导体材料中以到达图像传感器电路的第一深度。 具有第二掺杂区域的第二像素设置在半导体材料的背面附近并且延伸到半导体材料中的比第一深度小的第二深度。 第三掺杂区域设置在第二掺杂区域和半导体材料的图像传感器电路正面之间。 第三掺杂区域与第一掺杂区域和第二掺杂区域电隔离。

    DOPANT CONFIGURATION IN IMAGE SENSOR PIXELS
    14.
    发明申请
    DOPANT CONFIGURATION IN IMAGE SENSOR PIXELS 审中-公开
    图像传感器像素中的DOPANT配置

    公开(公告)号：US20160071892A1

    公开(公告)日：2016-03-10

    申请号：US14478931

    申请日：2014-09-05

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Gang Chen ,  Philippe Matagne ,  Chih-Wei Hsiung ,  Yuanwei Zheng ,  Duli Mao ,  Dyson H. Tai

    IPC: H01L27/146 ,  H04N5/374 ,  H04N5/378

    CPC classification number: H01L27/1461 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14689

    Abstract: An image sensor pixel including a photodiode includes a first dopant region disposed within a semiconductor layer and a second dopant region disposed above the first dopant region and within the semiconductor layer. The second dopant region contacts the first dopant region and the second dopant region is of an opposite majority charge carrier type as the first dopant region. A third dopant region is disposed above the first dopant region and within the semiconductor layer. The third dopant region is of a same majority charge carrier type as the second dopant region but has a greater concentration of free charge carriers than the second dopant region. A transfer gate is positioned to transfer photogenerated charge from the photodiode. The second dopant region extends closer to an edge of the transfer gate than the third dopant region.

    Abstract translation: 包括光电二极管的图像传感器像素包括设置在半导体层内的第一掺杂区和设置在第一掺杂区之上和半导体层内的第二掺杂区。 第二掺杂剂区域接触第一掺杂剂区域，并且第二掺杂剂区域具有与第一掺杂剂区域相反的多数电荷载流子类型。 第三掺杂剂区域设置在第一掺杂剂区域之上和半导体层内。 第三掺杂剂区域具有与第二掺杂剂区域相同的多数电荷载流子类型，但是具有比第二掺杂剂区域更大的自由电荷载流子浓度。 转移门被定位成从光电二极管转移光生电荷。 第二掺杂剂区域比第三掺杂剂区域更靠近传输栅极的边缘延伸。

    Negatively biased isolation structures for pixel devices
    17.
    发明授权
    Negatively biased isolation structures for pixel devices 有权

    公开(公告)号：US11502120B2

    公开(公告)日：2022-11-15

    申请号：US16721320

    申请日：2019-12-19

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Kazufumi Watanabe ,  Chih-Wei Hsiung ,  Vincent Venezia ,  Young Woo Jung ,  Geunsook Park ,  Lindsay Alexander Grant

    IPC: H01L27/146

    Abstract: Backside illuminated sensor pixel structure. In one embodiment, and image sensor includes a plurality of pixels arranged in rows and columns of a pixel array that are disposed in a semiconductor substrate. Individual photodiodes of the pixel array are configured to receive an incoming light through a backside of the semiconductor substrate. A front side of the semiconductor substrate is opposite from the backside. A plurality of transistors disposed proximate to the front side of the semiconductor substrate, are arranged in a row along an outer perimeter of the photodiodes of the respective pixel; and a plurality of isolation structures arranged to bracket the row of transistors along the outer perimeter of the photodiodes. A plurality of contacts electrically contacting the plurality of isolation structures, and the contacts are configured to voltage-bias the plurality of isolation structures.

    Image sensor with enhanced quantum efficiency
    18.
    发明授权
    Image sensor with enhanced quantum efficiency 有权
    具有增强量子效率的图像传感器

    公开(公告)号：US09565405B2

    公开(公告)日：2017-02-07

    申请号：US14612961

    申请日：2015-02-03

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Gang Chen ,  Dominic Massetti ,  Chih-Wei Hsiung ,  Arvind Kumar ,  Yuanwei Zheng ,  Duli Mao ,  Dyson H. Tai

    IPC: H04N9/04 ,  H01L27/146 ,  H04N5/3745

    CPC classification number: H04N9/045 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14647 ,  H04N5/37457

    Abstract: A back side illuminated image sensor includes a pixel array including semiconductor material, and image sensor circuitry disposed on a front side of the semiconductor material to control operation of the pixel array. A first pixel includes a first doped region disposed proximate to a back side of the semiconductor material and extends into the semiconductor material a first depth to reach the image sensor circuitry. A second pixel with a second doped region is disposed proximate to the back side of the semiconductor material and extends into the semiconductor material a second depth which is less than the first depth. A third doped region is disposed between the second doped region and the image sensor circuitry on the front side of the semiconductor material. The third doped region is electrically isolated from the first doped region and the second doped region.

    Abstract translation: 背面照明图像传感器包括包括半导体材料的像素阵列和设置在半导体材料的前侧上以控制像素阵列的操作的图像传感器电路。 第一像素包括靠近半导体材料的背面设置的第一掺杂区域，并延伸到半导体材料中以到达图像传感器电路的第一深度。 具有第二掺杂区域的第二像素设置在半导体材料的背面附近并且延伸到半导体材料中的比第一深度小的第二深度。 第三掺杂区域设置在半导体材料的前侧上的第二掺杂区域和图像传感器电路之间。 第三掺杂区域与第一掺杂区域和第二掺杂区域电隔离。

    PHOTOSENSITIVE CAPACITOR PIXEL FOR IMAGE SENSOR
    19.
    发明申请
    PHOTOSENSITIVE CAPACITOR PIXEL FOR IMAGE SENSOR 审中-公开
    用于图像传感器的感光电容像素

    公开(公告)号：US20170025468A1

    公开(公告)日：2017-01-26

    申请号：US15286392

    申请日：2016-10-05

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Wu-Zang Yang ,  Chia-Ying Liu ,  Chih-Wei Hsiung ,  Chun-Yung Ai ,  Dyson H. Tai ,  Dominic Massetti

    IPC: H01L27/146

    CPC classification number: H01L27/14692 ,  H01L27/14607 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14629 ,  H01L27/14636 ,  H01L27/14638 ,  H01L27/1464 ,  H01L27/14685 ,  H01L27/14687 ,  H01L27/14689 ,  H01L28/55 ,  H01L28/56 ,  H01L28/90

    Abstract: A method of fabricating a pixel array includes forming a transistor network along a frontside of a semiconductor substrate. A contact element is formed for every pixel in the pixel array that is electrically coupled to a transistor within the transistor network. An interconnect layer is formed upon the frontside to control the transistor network with a dielectric that covers the contact element. A cavity is formed in the interconnect layer. A conductive layer is formed along cavity walls of the cavity and a dielectric layer is formed over the conductive layer within the cavity. A photosensitive semiconductor material is deposited over the dielectric layer within the cavity. An electrode cavity is formed that extends into the contact element. The electrode cavity is at least partially filled with a conductive material to form an electrode. The electrode, the conductive layer, and the photosensitive semiconductor material form a photosensitive capacitor.

    Abstract translation: 制造像素阵列的方法包括沿着半导体衬底的前侧形成晶体管网络。 形成像素阵列中与晶体管网络内的晶体管电耦合的每个像素的接触元件。 在前侧形成互连层，以用覆盖接触元件的电介质来控制晶体管网络。 在互连层中形成空腔。 沿着空腔的空腔壁形成导电层，并且在腔内的导电层上形成电介质层。 感光半导体材料沉积在空腔内的电介质层上。 形成延伸到接触元件的电极腔。 电极腔至少部分地填充有导电材料以形成电极。 电极，导电层和感光半导体材料形成感光电容器。

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