Abstract:
A method of manufacturing an optoelectronic semiconductor chip includes providing a growth substrate, growing a semiconductor layer sequence on the growth substrate, depositing a metallization on a side of the semiconductor layer sequence remote from the growth substrate, depositing a layer on the metallization, coupling a carrier to the layer on a side of the layer remote from the semiconductor layer sequence, separating the growth substrate from the semiconductor layer sequence, depositing an electrically conductive layer on a side of the semiconductor layer sequence facing away from the carrier, separating the carrier from the layer, thereby forming a layer stack with the metallization, the semiconductor layer sequence, the electrically conductive layer and a coupling layer including at least a part of a further material of the layer remaining on a side of the metallization remote from the semiconductor layer sequence, and coupling the layer stack to a chip carrier.
Abstract:
An optoelectronic semiconductor chip is disclosed. In an embodiment an optoelectronic semiconductor chip includes a semiconductor body comprising a first semiconductor structure, a second semiconductor structure and an active region between the first and the second semiconductor structure and a plurality of recesses, each penetrating at least one of the semiconductor structures and the active region, wherein a cover surface of the active region is a continuous surface, and wherein at least in some of the recesses, surfaces of the recesses are completely covered with an electrically insulating material.
Abstract:
An optoelectronic semiconductor body includes a semiconductor layer sequence having an active region that generates radiation, a first barrier region and a second barrier region, wherein the active region is arranged between the first barrier region and the second barrier region; and at least one charge carrier barrier layer is arranged in the first barrier region, said at least one charge carrier barrier layer being tensile-strained.
Abstract:
An optoelectronic component (10) is specified, comprising a semiconductor body (6) with an active region (4) suitable for emission of radiation and comprising a quantum well structure, wherein the quantum well structure comprises at least one quantum well layer (41) and barrier layers (42), a first electrical contact (1) and a second electrical contact (2), wherein the active region (4) comprises at least one intermixed region (44) and at least one non-intermixed region (43). The at least one quantum well layer (41) and the barrier layers (42) are at least partially intermixed in the intermixed region (44), such that the intermixed region (44) comprises a larger electronic bandgap than the at least one quantum well layer (41) in the non-intermixed region (43). The first electrical contact (1) is a metal contact arranged on a radiation exit surface of the semiconductor body (6), wherein the intermixed region (44) is arranged below the first contact (1) in the vertical direction. Further, a method for producing the optoelectronic component (10) is specified.
Abstract:
An optoelectronic semiconductor device and a method for manufacturing an optoelectronic semiconductor device are disclosed. In an embodiment an optoelectronic semiconductor device includes a semiconductor body having a first region of a first conductive type, an active region configured to generate electromagnetic radiation, a second region of a second conductive type and a coupling-out surface configured to couple-out the electromagnetic radiation, wherein the first region, the active region and the second region are arranged along a stacking direction, wherein the active region extends from a rear surface opposite the coupling-out surface to the coupling-out surface along a longitudinal direction transverse to or perpendicular to the stacking direction, and wherein the coupling-out surface is arranged plane-parallel to the rear surface.
Abstract:
A method of aligning semiconductor chips in a medium includes providing an electrically insulating liquid medium; providing semiconductor chips; forming a suspension with the medium and the semiconductor chips; exposing the semiconductor chips to electromagnetic radiation that generates free charge carriers in the semiconductor chips; arranging the suspension in an electric field in which the semiconductor chips are aligned along the electric field; and curing the medium after aligning the semiconductor chips.
Abstract:
A method for exposing side surfaces of a semiconductor body is disclosed. In an embodiment a method includes providing the semiconductor body having a laterally extending first main surface, forming a plurality of vertical side surfaces by partially removing material of the semiconductor body and thereby removing the first main surface in places, wherein each of the side surfaces forms an angle (α) between 110° and 160° inclusive with the remaining first main surface, applying a protective layer onto the semiconductor body so that, in a plan view, the protective layer completely covers the remaining first main surface and the obliquely formed side surfaces and partially removing the protective layer so that the protective layer is removed in regions on the obliquely formed side surfaces because of an inclination and remains at least partially preserved in regions on the remaining first main surface during a common process operation.
Abstract:
A semiconductor layer sequence includes an n-conducting n-type side, a p-conducting p-type side, and an active zone between the sides, the active zone simultaneously generating a first radiation having a first wavelength and a second radiation having a second wavelength, the active zone including at least one radiation-active layer having a first material composition that generates the first radiation, the at least one radiation-active layer is oriented perpendicular to a growth direction of the semiconductor layer sequence, the active zone includes a multiplicity of radiation-active tubes having a second material composition and/or having a crystal structure that generates the second radiation, which crystal structure deviates from the at least one radiation-active layer, and the radiation-active tubes are oriented parallel to the growth direction, the radiation-active tubes having an average diameter of 5 nm to 100 nm and an average surface density of the radiation-active tubes of 108 1/cm2 to 1011 1/cm2.
Abstract:
An optoelectronic semiconductor body includes a semiconductor layer sequence having an active region that generates radiation, a first barrier region and a second barrier region, wherein the active region is arranged between the first barrier region and the second barrier region; and at least one charge carrier barrier layer is arranged in the first barrier region, said at least one charge carrier barrier layer being tensile-strained.
Abstract:
In an embodiment a method for manufacturing a semiconductor device include providing a growth substrate, depositing an n-doped first layer, depositing an active region on the n-doped first layer, depositing a second layer onto the active region, depositing magnesium (Mg) in the second layer and subsequently to depositing Mg, depositing zinc (Zn) in the second layer such that a concentration of Zn in the second layer decreases from a first value to a second value in a first area of the second layer adjacent to the active region, the first area being in a range of 5 nm to 200 nm.