公开(公告)号：US20160179181A1

公开(公告)日：2016-06-23

申请号：US14579899

申请日：2014-12-22

Applicant: QUALCOMM INCORPORATED

Inventor： James Thomas Doyle ,  Zhengming Fu ,  Farsheed Mahmoudi ,  Amirali Shayan Arani ,  Nazanin Darbanian

IPC: G06F1/32

CPC classification number: G06F1/3287 ,  G05F1/575 ,  G06F1/3296 ,  H02M2001/0045 ,  H02M2003/1566

Abstract: Operational mode changes in a system-on-a-chip (SoC) integrated circuit in a complex device such as a mobile phone cause spikes in current demand which can cause voltage droops that disrupt operation of the SoC. A hybrid parallel power supply connects a switching-mode power supply and a low-dropout voltage regulator in parallel to provide high efficiency and fast response times. Integration of the voltage regulator on the SoC reduces parasitic impedance be between the voltage regulator and the load to aid in reducing voltage droops. The switching-mode power supply and the low-dropout voltage regulator can regulate their outputs to slightly difference voltage levels. This can allow the switching-mode power supply to supply most of the SoC's current demands.

Abstract translation: 诸如移动电话等复杂设备的片上系统芯片（SoC）集成电路的运行模式变化会导致电流需求的尖峰，从而导致电压下降，从而破坏了SoC的运行。 混合并联电源并联连接开关电源和低压差稳压器，以提供高效率和快速的响应时间。 电压调节器在SoC上的集成可减少电压调节器和负载之间的寄生阻抗，有助于降低电压下降。 开关电源和低压差稳压器可以将其输出调节为稍微不同的电压电平。 这可以允许开关电源供应大部分SoC的当前需求。

公开(公告)号：US20160118895A1

公开(公告)日：2016-04-28

申请号：US14863269

申请日：2015-09-23

Applicant: QUALCOMM Incorporated

Inventor： Farsheed Mahmoudi ,  James Thomas Doyle ,  Chuang Zhang ,  Zhengming Fu

IPC: H02M3/158 ,  G06F1/32

CPC classification number: H02M3/1584 ,  G06F1/3296 ,  H02M1/088 ,  H02M3/157 ,  H02M2001/0048 ,  H02M2001/0054 ,  Y02B70/1491

Abstract: An apparatus and method are disclosed for providing efficient operation in a feedback loop having a synchronous buck converter. The synchronous buck converter includes a plurality of individually selectable phases, where each of the phases has a plurality of individually selectable and parallel switching legs. The circuit stores information that associates multiple different load values with respective configuration settings that each define a number of phases and a number of switching legs. As the load changes, the circuit measures the load and selects an appropriate configuration setting. The circuit applies the selected configuration setting to operate the number of phases and a number of parallel switching legs in the buck converter.

Abstract translation: 公开了一种用于在具有同步降压转换器的反馈回路中提供有效操作的装置和方法。 同步降压转换器包括多个单独可选择的相位，其中每个相位具有多个可单独选择和并联的开关支路。 电路存储将多个不同负载值与各自配置设置相关联的信息，每个配置设置定义多个相位和多个开关支路。 当负载变化时，电路测量负载并选择适当的配置设置。 该电路应用所选配置设置来操作降压转换器中的相数和多个并联开关支路。

公开(公告)号：US10313609B2

公开(公告)日：2019-06-04

申请号：US15264431

申请日：2016-09-13

Applicant: QUALCOMM Incorporated

Inventor： Zhengming Fu ,  Soo Youn Kim ,  Jan Christian Huber

IPC: H04N5/347 ,  H04N5/355 ,  H04N5/374 ,  H01L27/146 ,  H04N5/3745

Abstract: Methods, systems, computer-readable media, and apparatuses for image sensors with pixel binning with configurable shared floating diffusion are presented. In one example, an image sensor system includes a plurality of sensor elements; a photo-sensitive layer coupled to the plurality of sensor elements; a plurality of floating diffusion regions in communication with the photo-sensitive layer, each floating diffusion region of the plurality of floating diffusion regions configured to be selectively enabled; and at least one bridge coupled to two floating diffusion regions of the plurality of floating diffusion regions, the bridge configured to be selectively enabled and, when enabled, to allow a transfer of charge between the two floating diffusion regions.

公开(公告)号：US09891646B2

公开(公告)日：2018-02-13

申请号：US14606753

申请日：2015-01-27

Applicant: QUALCOMM Incorporated

Inventor： Zhengming Fu ,  James Thomas Doyle ,  Nazanin Darbanian ,  Shree Krishna Pandey ,  Yi Cao

IPC: G05F1/575 ,  G05F3/08 ,  H02M3/158 ,  H02M1/00 ,  H02M3/156

CPC classification number: G05F3/08 ,  G05F1/575 ,  H02M3/158 ,  H02M3/1582 ,  H02M2001/0045 ,  H02M2003/1566

Abstract: Operational mode changes in a system-on-a-chip (SoC) integrated circuit in a complex device such as a mobile phone cause spikes in current demand which can cause voltage droops that disrupt operation of the SoC. A hybrid parallel power supply capacitively couples a switching-mode power supply and a low-dropout voltage regulator in parallel to provide high efficiency and fast response times. The low-dropout voltage regulator may include a class-AB operational transconductance amplifier driving the coupling capacitor. The switching-mode power supply and the low-dropout voltage regulator can regulate their outputs to slightly difference voltage levels. This can allow the switching-mode power supply to supply most of the SoC's current demands.

公开(公告)号：US20170302865A1

公开(公告)日：2017-10-19

申请号：US15264431

申请日：2016-09-13

Applicant: QUALCOMM Incorporated

Inventor： Zhengming Fu ,  Soo Youn Kim ,  Jan Christian Huber

IPC: H04N5/347 ,  H01L27/146 ,  H04N5/374

CPC classification number: H04N5/347 ,  H01L27/14612 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14638 ,  H01L27/14643 ,  H01L27/14665 ,  H04N5/3559 ,  H04N5/374 ,  H04N5/3745

Abstract: Methods, systems, computer-readable media, and apparatuses for image sensors with pixel binning with configurable shared floating diffusion are presented. In one example, an image sensor system includes a plurality of sensor elements; a photo-sensitive layer coupled to the plurality of sensor elements; a plurality of floating diffusion regions in communication with the photo-sensitive layer, each floating diffusion region of the plurality of floating diffusion regions configured to be selectively enabled; and at least one bridge coupled to two floating diffusion regions of the plurality of floating diffusion regions, the bridge configured to be selectively enabled and, when enabled, to allow a transfer of charge between the two floating diffusion regions.

公开(公告)号：US09785222B2

公开(公告)日：2017-10-10

申请号：US14579899

申请日：2014-12-22

Applicant: QUALCOMM Incorporated

Inventor： James Thomas Doyle ,  Zhengming Fu ,  Farsheed Mahmoudi ,  Amirali Shayan Arani ,  Nazanin Darbanian

IPC: H02M3/156 ,  G06F1/32 ,  G05F1/575 ,  H02M1/00

CPC classification number: G06F1/3287 ,  G05F1/575 ,  G06F1/3296 ,  H02M2001/0045 ,  H02M2003/1566

Abstract: Operational mode changes in a system-on-a-chip (SoC) integrated circuit in a complex device such as a mobile phone cause spikes in current demand which can cause voltage droops that disrupt operation of the SoC. A hybrid parallel power supply connects a switching-mode power supply and a low-dropout voltage regulator in parallel to provide high efficiency and fast response times. Integration of the voltage regulator on the SoC reduces parasitic impedance be between the voltage regulator and the load to aid in reducing voltage droops. The switching-mode power supply and the low-dropout voltage regulator can regulate their outputs to slightly difference voltage levels. This can allow the switching-mode power supply to supply most of the SoC's current demands.

公开(公告)号：US09671438B2

公开(公告)日：2017-06-06

申请号：US14533950

申请日：2014-11-05

Applicant: QUALCOMM Incorporated

Inventor： Chuang Zhang ,  Zhengming Fu ,  Nan Chen

IPC: G01R19/25 ,  G01R19/32 ,  G01R19/00

CPC classification number: G01R19/25 ,  G01R19/0092 ,  G01R19/32

Abstract: In one embodiment, a method for measuring current is described herein. The method comprises shorting first and second inputs of an amplifying circuit to generate a first output signal, and converting the first output signal into an offset cancelation value. The method also comprises passing a current through a power switch, wherein the current generates a voltage drop across the power switch, applying the voltage drop across the first and second inputs of the amplifying circuit to generate a second output signal, and converting the second output signal into a current value. The method further comprises subtracting the offset cancelation value from the current value to generate an offset-compensated current value.

公开(公告)号：US20160124030A1

公开(公告)日：2016-05-05

申请号：US14533950

申请日：2014-11-05

Applicant: QUALCOMM Incorporated

Inventor： Chuang Zhang ,  Zhengming Fu ,  Nan Chen

IPC: G01R19/25 ,  G01R19/32

CPC classification number: G01R19/25 ,  G01R19/0092 ,  G01R19/32

Abstract: In one embodiment, a method for measuring current is described herein. The method comprises shorting first and second inputs of an amplifying circuit to generate a first output signal, and converting the first output signal into an offset cancelation value. The method also comprises passing a current through a power switch, wherein the current generates a voltage drop across the power switch, applying the voltage drop across the first and second inputs of the amplifying circuit to generate a second output signal, and converting the second output signal into a current value. The method further comprises subtracting the offset cancelation value from the current value to generate an offset-compensated current value.

Abstract translation: 在一个实施例中，这里描述了一种用于测量电流的方法。 该方法包括缩短放大电路的第一和第二输入以产生第一输出信号，并将第一输出信号转换成偏移消除值。 该方法还包括使电流通过电源开关，其中电流在功率开关两端产生电压降，在放大电路的第一和第二输入端施加电压降，以产生第二输出信号，并转换第二输出 信号变成当前值。 该方法还包括从当前值减去偏移消除值以产生偏移补偿电流值。

公开(公告)号：US20160118893A1

公开(公告)日：2016-04-28

申请号：US14918893

申请日：2015-10-21

Applicant: QUALCOMM Incorporated

Inventor： James Thomas Doyle ,  Farsheed Mahmoudi ,  Chuang Zhang ,  Zhengming Fu ,  Sassan Shahrokhinia

IPC: H02M3/158

CPC classification number: H02M3/158 ,  H02M1/38 ,  H02M3/157 ,  H02M2001/0012 ,  H02M2001/0048 ,  Y02B70/1491

Abstract: An apparatus and method are disclosed for efficiently using power at a voltage regulator, such as a synchronous buck converter. The synchronous buck converter includes a first switch and a second switch operated by a first control signal and a second control signal, respectively, where the first and second control signals have a corresponding phase difference. A logic circuit measures a duty cycle of an input pulse width modulated (PWM) signal against iterative changes of the phase difference between the first control signal and the second control signal. The logic circuit selects a phase difference corresponding to a minimum value of the PWM signal, thereby optimizing dead time at the synchronous buck converter. The logic circuit may include a Digital Pulse Width Modulator.

Abstract translation: 公开了一种用于在诸如同步降压转换器的电压调节器处有效地使用电力的装置和方法。 同步降压转换器包括分别由第一控制信号和第二控制信号操作的第一开关和第二开关，其中第一和第二控制信号具有相应的相位差。 逻辑电路针对第一控制信号和第二控制信号之间的相位差的迭代变化来测量输入脉宽调制（PWM）信号的占空比。 逻辑电路选择与PWM信号的最小值相对应的相位差，从而优化同步降压转换器的死区时间。 逻辑电路可以包括数字脉宽调制器。