公开(公告)号：US20150048497A1

公开(公告)日：2015-02-19

申请号：US13968708

申请日：2013-08-16

Applicant: QUALCOMM Incorporated

Inventor： Brian Matthew Henderson ,  Shiqun Gu ,  Urmi Ray

IPC: H01L23/498 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L21/76802 ,  H01L23/60 ,  H01L31/0443 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  Y02E10/50

Abstract: A photovoltaic (PV) substrate includes a grooved die-facing surface to form a channel for a bypass diode. The die-facing surface supports a screen-printed metal interconnect layer to form a first terminal for the bypass diode.

Abstract translation: 光伏（PV）衬底包括沟槽的面对芯片的表面，以形成旁路二极管的通道。 面向芯片的表面支撑丝网印刷金属互连层，以形成用于旁路二极管的第一端子。

公开(公告)号：US09853446B2

公开(公告)日：2017-12-26

申请号：US14838034

申请日：2015-08-27

Applicant: QUALCOMM Incorporated

Inventor： Shiqun Gu ,  Eugene Robert Worley ,  Ratibor Radojcic ,  Urmi Ray

IPC: H02H9/04 ,  H01L23/48 ,  H01L23/60 ,  H01L23/62 ,  H01L27/02

CPC classification number: H02H9/046 ,  H01L23/48 ,  H01L23/60 ,  H01L23/62 ,  H01L27/0255 ,  H01L27/0292 ,  H01L27/0296 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01L2924/181 ,  H02H9/044 ,  H01L2924/00012

Abstract: An intergrated circuit (IC) package includes a die, a package substrate coupled to the die, and a first electrostatic discharge (ESD) protection component coupled to the package substrate, where the first electrostatic discharge (ESD) protection component is configured to provide package level electrostatic discharge (ESD) protection. In some implementations, the first electrostatic discharge (ESD) protection component is embedded in the package substrate. In some implementations, the die includes an internal electrostatic discharge (ESD) protection component configured to provide die level electrostatic discharge (ESD) protection. In some implementations, the internal electrostatic discharge (ESD) protection component and the first electrostatic discharge (ESD) protection component are configured to provide cumulative electrostatic discharge (ESD) protection for the die.

公开(公告)号：US09087765B2

公开(公告)日：2015-07-21

申请号：US13839816

申请日：2013-03-15

Applicant: QUALCOMM Incorporated

Inventor： Dexter Tamio Chun ,  Jungwon Suh ,  Urmi Ray ,  Shiqun Gu

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/16 ,  H01L23/14 ,  H01L23/31 ,  H01L23/373 ,  H01L23/15

CPC classification number: H01L23/16 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/3737 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/13 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81203 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/11

Abstract: An integrated circuit package is disclosed that includes a first-pitch die and a second-pitch die. The second-pitch die interconnects to the second-pitch substrate through second-pitch substrates. The first-pitch die interconnects through first-pitch interconnects to an interposer adapter. The pitch of the first-pitch interconnects is too fine for the second-pitch substrate. But the interposer adapter interconnects through second-pitch interconnects to the second-pitch substrate and includes through substrate vias so that I/O signaling between the first-pitch die and the second-pitch die can be conducted through the second-pitch substrate and through the through substrate vias in the interposer adapter.

Abstract translation: 公开了一种集成电路封装，其包括第一间距管芯和第二间距管芯。 第二间距模具通过第二间距基板与第二间距基板相互连接。 第一间距模具通过第一间距互连件互连到插入器适配器。 第一节距互连的间距对于第二间距衬底来说太细了。 但是插入器适配器通过第二间距互连件连接到第二间距衬底并且包括通过衬底通孔，使得第一间距管芯和第二间距管芯之间的I / O信号可以通过第二间距衬底并且通过 贯穿衬底通孔插入插座适配器中。