公开(公告)号：US10185683B2

公开(公告)日：2019-01-22

申请号：US14575491

申请日：2014-12-18

Applicant: RF Micro Devices, Inc.

Inventor： Christopher Truong Ngo ,  Alexander Wayne Hietala ,  Christian Rye Iversen ,  Ruediger Bauder

IPC: G06F13/00 ,  G06F13/362 ,  G06F13/42

Abstract: A bus interface system is disclosed that includes a master bus controller and a slave bus controller that are coupled by a bus line. The slave bus controller includes a decoder that allows for data to be transmitted along just the bus line. The decoder includes an oscillator, a first counter, and a comparison circuit. The oscillator is configured to be enabled by data pulses defined by the input data signal and generate oscillation pulses while enabled. The first counts the oscillation pulses and indicates a number of the oscillation pulses generated during a time slot. The comparison circuit is configured to this number with a reference number and generate a data output that represents a first logical value in response to the number being greater than the reference parameter and represents a second logical value in response to the number being less than the reference parameter.

公开(公告)号：US09484879B2

公开(公告)日：2016-11-01

申请号：US14298872

申请日：2014-06-06

Applicant: RF Micro Devices, Inc.

Inventor： Baker Scott ,  George Maxim ,  Dirk Robert Walter Leipold ,  Christian Rye Iversen ,  Eric K. Bolton ,  Daniel Charles Kerr

IPC: H03F3/193 ,  H03F1/56 ,  H03H7/01 ,  H03H7/46 ,  H04B1/10 ,  H03F3/24 ,  H03F3/68 ,  H03F3/72 ,  H04B1/18 ,  H03H7/09

CPC classification number: H03H7/465 ,  H03F1/565 ,  H03F3/193 ,  H03F3/245 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/267 ,  H03F2200/451 ,  H03F2203/7209 ,  H03H7/0115 ,  H03H7/0153 ,  H03H7/09 ,  H03H7/1775 ,  H03H7/46 ,  H03H7/463 ,  H03H2210/012 ,  H03H2210/025 ,  H03H2210/04 ,  H04B1/1027 ,  H04B1/18

Abstract: An apparatus, which includes a first electronic device, a first nonlinear capacitance compensation circuit, and a capacitance compensation control circuit, is disclosed. The first electronic device has a first nonlinear capacitance and is coupled to the first nonlinear capacitance compensation circuit, which has a first compensation capacitance and receives a first compensation control signal. The capacitance compensation control circuit adjusts the first compensation capacitance using the first compensation control signal to at least partially linearize the first nonlinear capacitance.

Abstract translation: 公开了一种装置，其包括第一电子装置，第一非线性电容补偿电路和电容补偿控制电路。 第一电子设备具有第一非线性电容并且耦合到具有第一补偿电容并且接收第一补偿控制信号的第一非线性电容补偿电路。 电容补偿控制电路使用第一补偿控制信号来调整第一补偿电容，以使第一非线性电容至少部分线性化。

公开(公告)号：US20140242760A1

公开(公告)日：2014-08-28

申请号：US14276370

申请日：2014-05-13

Applicant: RF Micro Devices, Inc.

Inventor： Michael Carroll ,  Daniel Charles Kerr ,  Christian Rye Iversen ,  Philip W. Mason ,  Julio Costa ,  Edward T. Spears

IPC: H01L21/84

CPC classification number: H01L21/84 ,  H01L21/743 ,  H01L27/1203 ,  H01L29/4238 ,  H01L29/7833

Abstract: The present disclosure relates to a radio frequency (RF) switch that includes multiple body-contacted field effect transistor (FET) elements coupled in series. The FET elements may be formed using a thin-film semiconductor device layer, which is part of a thin-film semiconductor die. Conduction paths between the FET elements through the thin-film semiconductor device layer and through a substrate of the thin-film semiconductor die may be substantially eliminated by using insulating materials. Elimination of the conduction paths allows an RF signal across the RF switch to be divided across the series coupled FET elements, such that each FET element is subjected to only a portion of the RF signal. Further, each FET element is body-contacted and may receive reverse body biasing when the RF switch is in an OFF state, thereby reducing an OFF state drain-to-source capacitance of each FET element.

Abstract translation: 本发明涉及射频（RF）开关，其包括串联耦合的多个体接触场效应晶体管（FET）元件。 可以使用作为薄膜半导体管芯的一部分的薄膜半导体器件层来形成FET元件。 通过薄膜半导体器件层和通过薄膜半导体晶片的衬底的FET元件之间的导通路径可以通过使用绝缘材料基本上消除。 消除导通路径允许跨越RF开关的RF信号在串联耦合的FET元件之间被划分，使得每个FET元件仅受到RF信号的一部分的影响。 此外，当RF开关处于OFF状态时，每个FET元件被体接触并且可以接收反向主体偏置，从而降低每个FET元件的截止状态漏极 - 源极电容。

公开(公告)号：US20140028521A1

公开(公告)日：2014-01-30

申请号：US13851657

申请日：2013-03-27

Applicant: RF MICRO DEVICES, INC.

Inventor： Ruediger Bauder ,  Christian Rye Iversen

IPC: H03H7/38 ,  H01Q1/50

CPC classification number: H03H7/38 ,  H01Q1/50 ,  H03H7/40

Abstract: Adjustable impedance tuning circuitry includes a first impedance matching terminal, a second impedance matching terminal, and a plurality of passive components adapted to match the impedance of the first impedance matching terminal and the second impedance matching terminal. The plurality of passive components includes one or more tunable components adapted to adjust the impedance of the adjustable impedance tuning circuitry to maintain an impedance match between the first impedance matching terminal and the second impedance matching terminal over a variety of operating conditions. Each of the one or more tunable components includes one or more switches adapted to selectively alter the impedance of the tunable component. The one or more switches are integrated onto a single semiconductor die in order to facilitate the performance of the adjustable impedance tuning circuitry over a wide bandwidth.

Abstract translation: 可调阻抗调谐电路包括第一阻抗匹配端子，第二阻抗匹配端子和适于匹配第一阻抗匹配端子和第二阻抗匹配端子的阻抗的多个无源部件。 多个无源部件包括适于调节可调阻抗调谐电路的阻抗的一个或多个可调部件，以便在各种操作条件下保持第一阻抗匹配端子和第二阻抗匹配端子之间的阻抗匹配。 一个或多个可调组件中的每一个包括适于选择性地改变可调组件的阻抗的一个或多个开关。 一个或多个开关被集成到单个半导体管芯上，以便于在宽带宽上实现可调阻抗调谐电路的性能。