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公开(公告)号：US09559745B2
公开(公告)日：2017-01-31
申请号：US14171994
申请日：2014-02-04
Applicant: RF Micro Devices, Inc.
Inventor： Jeppe Korshøj Bendixen , Daniel Charles Kerr , Christian Rye Iversen
Abstract: Antenna tuning switch circuitry includes an input port, a shunt switch, control circuitry, and an integrated ground. The shunt switch is coupled between the input port and the integrated ground. The control circuitry includes a control signal input port, a switch driver output port coupled to the shunt switch, and a ground connection port coupled to the integrated ground. The shunt switches, the RF input ports, the control circuitry, and the integrated ground are monolithically integrated on a single semiconductor die. The antenna tuning switch circuitry is adapted to selectively couple the input port to the integrated ground in order to alter one or more operating parameters of an attached antenna. By monolithically integrating the shunt switch together with the control circuitry and the integrated ground, the ON state impedance and the parasitic OFF state impedance of the antenna tuning switch circuitry can be significantly improved.
Abstract translation: 天线调谐开关电路包括输入端口，分流开关，控制电路和集成接地。 分流开关耦合在输入端口和集成接地之间。 控制电路包括控制信号输入端口，耦合到并联开关的开关驱动器输出端口以及耦合到集成接地的接地连接端口。 分流开关，RF输入端口，控制电路和集成接地单个集成在单个半导体管芯上。 天线调谐开关电路适于选择性地将输入端口耦合到集成地，以便改变连接的天线的一个或多个操作参数。 通过将分流开关与控制电路和集成接地单片集成，可以显着地改善天线调谐开关电路的导通状态阻抗和寄生OFF状态阻抗。
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公开(公告)号：US20140361839A1
公开(公告)日：2014-12-11
申请号：US14298872
申请日：2014-06-06
Applicant: RF Micro Devices, Inc.
Inventor： Baker Scott , George Maxim , Dirk Robert Walter Leipold , Christian Rye Iversen , Eric K. Bolton , Daniel Charles Kerr
IPC: H03F3/193
CPC classification number: H03H7/465 , H03F1/565 , H03F3/193 , H03F3/245 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/267 , H03F2200/451 , H03F2203/7209 , H03H7/0115 , H03H7/0153 , H03H7/09 , H03H7/1775 , H03H7/46 , H03H7/463 , H03H2210/012 , H03H2210/025 , H03H2210/04 , H04B1/1027 , H04B1/18
Abstract: An apparatus, which includes a first electronic device, a first nonlinear capacitance compensation circuit, and a capacitance compensation control circuit, is disclosed. The first electronic device has a first nonlinear capacitance and is coupled to the first nonlinear capacitance compensation circuit, which has a first compensation capacitance and receives a first compensation control signal. The capacitance compensation control circuit adjusts the first compensation capacitance using the first compensation control signal to at least partially linearize the first nonlinear capacitance.
Abstract translation: 公开了一种装置，其包括第一电子装置，第一非线性电容补偿电路和电容补偿控制电路。 第一电子设备具有第一非线性电容并且耦合到具有第一补偿电容并且接收第一补偿控制信号的第一非线性电容补偿电路。 电容补偿控制电路使用第一补偿控制信号来调整第一补偿电容，以使第一非线性电容至少部分线性化。
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公开(公告)号：US20150054698A1
公开(公告)日：2015-02-26
申请号：US14465142
申请日：2014-08-21
Applicant: RF Micro Devices, Inc.
Inventor： Daniel Charles Kerr , Christian Rye Iversen , Eric K. Bolton , Ruediger Bauder , Nadim Khlat
IPC: H01Q5/00
Abstract: Antenna tuning circuitry includes an antenna tuning node, an antenna tuning switch, and a resonant tuning circuit. The antenna tuning node is coupled to a resonant conduction element of an antenna. The antenna tuning switch and the resonant tuning circuit are coupled in series between the antenna tuning switch and the antenna tuning node, such that the resonant tuning circuit is between the antenna tuning node and the antenna tuning switch. The resonant tuning circuit is configured to resonate at one or more harmonic frequencies generated by the antenna tuning switch such that a high impedance path is formed between the antenna tuning switch and the antenna tuning node at harmonic frequencies generated by the antenna tuning switch. Accordingly, harmonic interference generated by the antenna tuning switch is prevented from reaching the antenna, while simultaneously allowing for tuning of the antenna.
Abstract translation: 天线调谐电路包括天线调谐节点，天线调谐开关和谐振调谐电路。 天线调谐节点耦合到天线的谐振传导元件。 天线调谐开关和谐振调谐电路串联在天线调谐开关和天线调谐节点之间，使得谐振调谐电路在天线调谐节点和天线调谐开关之间。 谐振调谐电路被配置为在由天线调谐开关产生的一个或多个谐波频率下谐振，使得在天线调谐开关和天线调谐节点之间以由天线调谐开关产生的谐波频率形成高阻抗路径。 因此，防止由天线调谐开关产生的谐波干扰到达天线，同时允许调谐天线。
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公开(公告)号：US20130278317A1
公开(公告)日：2013-10-24
申请号：US13922337
申请日：2013-06-20
Applicant: RF Micro Devices, Inc.
Inventor： Christian Rye Iversen , Marcus Granger-Jones
IPC: H03H21/00
CPC classification number: H03H21/0007 , H03K17/102
Abstract: Switchable capacitive elements are disclosed, along with programmable capacitor arrays (PCAs). One embodiment of the switchable capacitive element includes a field effect transistor (FET) device stack, a first capacitor, and a second capacitor. The FET device stack is operable in an open state and in a closed state and has a plurality of FET devices coupled in series to form the FET device stack. The first capacitor and the second capacitor are both coupled in series with the FET device stack. However, the first capacitor is coupled to a first end of the FET device stack while the second capacitor is coupled to a second end opposite the first end of the FET device stack. In this manner, the switchable capacitive element can be operated without a negative charge pump, with decreased bias swings, and with a better power performance.
Abstract translation: 公开了可切换电容元件以及可编程电容器阵列（PCA）。 可切换电容元件的一个实施例包括场效应晶体管（FET）器件堆叠，第一电容器和第二电容器。 FET器件堆栈可在打开状态和关闭状态下工作，并且具有串联耦合以形成FET器件堆叠的多个FET器件。 第一电容器和第二电容器都与FET器件堆叠串联耦合。 然而，第一电容器耦合到FET器件堆叠的第一端，而第二电容器耦合到与FET器件堆叠的第一端相对的第二端。 以这种方式，可切换的电容元件可以在没有负电荷泵的情况下操作，具有减小的偏置摆动以及更好的功率性能。
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公开(公告)号：US20150192974A1
公开(公告)日：2015-07-09
申请号：US14659371
申请日：2015-03-16
Applicant: RF Micro Devices, Inc.
Inventor： Christopher Truong Ngo , Alexander Wayne Hietala , Christian Rye Iversen , Ruediger Bauder
IPC: G06F1/26 , G06F13/40 , G06F13/364 , G06F1/32
Abstract: Embodiments of bus interface systems are disclosed. In one embodiment, a bus interface system includes a master bus controller and a slave bus controller coupled along a bus line. The master bus controller is configured to generate an input data signal that is received by the slave bus controller along the bus line. The slave bus controller includes power conversion circuitry configured to convert the input data signal from the master bus controller into a supply voltage. By providing the power conversion circuitry, the slave bus controller is powered using the input data signal and without requiring an additional bus line to transfer a supply voltage to the slave bus controller.
Abstract translation: 公开了总线接口系统的实施例。 在一个实施例中，总线接口系统包括总线控制器和沿总线耦合的从总线控制器。 主总线控制器被配置为产生由总线控制器沿总线接收的输入数据信号。 从总线控制器包括被配置为将来自主总线控制器的输入数据信号转换成电源电压的功率转换电路。 通过提供电源转换电路，从总线控制器使用输入数据信号供电，而不需要额外的总线来将电源电压传送到从总线控制器。
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Patent Agency Ranking
公开(公告)号：US20150169482A1
公开(公告)日：2015-06-18
申请号：US14575491
申请日：2014-12-18
Applicant: RF MICRO DEVICES, INC.
Inventor： Christopher Truong Ngo , Alexander Wayne Hietala , Christian Rye Iversen , Ruediger Bauder
IPC: G06F13/362 , G06F1/08
CPC classification number: G06F13/3625 , G06F13/4278 , Y02D10/14 , Y02D10/151
Abstract: A bus interface system is disclosed that includes a master bus controller and a slave bus controller that are coupled by a bus line. The slave bus controller includes a decoder that allows for data to be transmitted along just the bus line. The decoder includes an oscillator, a first counter, and a comparison circuit. The oscillator is configured to be enabled by data pulses defined by the input data signal and generate oscillation pulses while enabled. The first counts the oscillation pulses and indicates a number of the oscillation pulses generated during a time slot. The comparison circuit is configured to this number with a reference number and generate a data output that represents a first logical value in response to the number being greater than the reference parameter and represents a second logical value in response to the number being less than the reference parameter.
Abstract translation: 公开了一种总线接口系统，其包括通过总线耦合的主总线控制器和从总线控制器。 从总线控制器包括允许数据沿着总线传输的解码器。 解码器包括振荡器，第一计数器和比较电路。 振荡器被配置为通过由输入数据信号定义的数据脉冲使能，并在使能时产生振荡脉冲。 第一个对振荡脉冲进行计数，并指示在时隙期间产生的振荡脉冲的数量。 比较电路被配置为具有参考号的该号码，并且响应于该数量大于参考参数而生成表示第一逻辑值的数据输出，并且响应于小于参考的数字表示第二逻辑值 参数。
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公开(公告)号：US09865922B2
公开(公告)日：2018-01-09
申请号：US14465142
申请日：2014-08-21
Applicant: RF Micro Devices, Inc.
Inventor： Daniel Charles Kerr , Christian Rye Iversen , Eric K. Bolton , Ruediger Bauder , Nadim Khlat
Abstract: Antenna tuning circuitry includes an antenna tuning node, an antenna tuning switch, and a resonant tuning circuit. The antenna tuning node is coupled to a resonant conduction element of an antenna. The antenna tuning switch and the resonant tuning circuit are coupled in series between the antenna tuning switch and the antenna tuning node, such that the resonant tuning circuit is between the antenna tuning node and the antenna tuning switch. The resonant tuning circuit is configured to resonate at one or more harmonic frequencies generated by the antenna tuning switch such that a high impedance path is formed between the antenna tuning switch and the antenna tuning node at harmonic frequencies generated by the antenna tuning switch. Accordingly, harmonic interference generated by the antenna tuning switch is prevented from reaching the antenna, while simultaneously allowing for tuning of the antenna.
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公开(公告)号：US09209784B2
公开(公告)日：2015-12-08
申请号：US13922337
申请日：2013-06-20
Applicant: RF Micro Devices, Inc.
Inventor： Christian Rye Iversen , Marcus Granger-Jones
CPC classification number: H03H21/0007 , H03K17/102
Abstract: Switchable capacitive elements are disclosed, along with programmable capacitor arrays (PCAs). One embodiment of the switchable capacitive element includes a field effect transistor (FET) device stack, a first capacitor, and a second capacitor. The FET device stack is operable in an open state and in a closed state and has a plurality of FET devices coupled in series to form the FET device stack. The first capacitor and the second capacitor are both coupled in series with the FET device stack. However, the first capacitor is coupled to a first end of the FET device stack while the second capacitor is coupled to a second end opposite the first end of the FET device stack. In this manner, the switchable capacitive element can be operated without a negative charge pump, with decreased bias swings, and with a better power performance.
Abstract translation: 公开了可切换电容元件以及可编程电容器阵列（PCA）。 可切换电容元件的一个实施例包括场效应晶体管（FET）器件堆叠，第一电容器和第二电容器。 FET器件堆栈可在打开状态和关闭状态下工作，并且具有串联耦合以形成FET器件堆叠的多个FET器件。 第一电容器和第二电容器都与FET器件堆叠串联耦合。 然而，第一电容器耦合到FET器件堆叠的第一端，而第二电容器耦合到与FET器件堆叠的第一端相对的第二端。 以这种方式，可切换的电容元件可以在没有负电荷泵的情况下操作，具有减小的偏置摆动以及更好的功率性能。
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公开(公告)号：US20140220911A1
公开(公告)日：2014-08-07
申请号：US14171994
申请日：2014-02-04
Applicant: RF Micro Devices, Inc.
Inventor： Jeppe Korshøj Bendixen , Daniel Charles Kerr , Christian Rye Iversen
Abstract: Antenna tuning switch circuitry includes an input port, a shunt switch, control circuitry, and an integrated ground. The shunt switch is coupled between the input port and the integrated ground. The control circuitry includes a control signal input port, a switch driver output port coupled to the shunt switch, and a ground connection port coupled to the integrated ground. The shunt switches, the RF input ports, the control circuitry, and the integrated ground are monolithically integrated on a single semiconductor die. The antenna tuning switch circuitry is adapted to selectively couple the input port to the integrated ground in order to alter one or more operating parameters of an attached antenna. By monolithically integrating the shunt switch together with the control circuitry and the integrated ground, the ON state impedance and the parasitic OFF state impedance of the antenna tuning switch circuitry can be significantly improved.
Abstract translation: 天线调谐开关电路包括输入端口，分流开关，控制电路和集成接地。 分流开关耦合在输入端口和集成接地之间。 控制电路包括控制信号输入端口，耦合到并联开关的开关驱动器输出端口以及耦合到集成接地的接地连接端口。 分流开关，RF输入端口，控制电路和集成接地单个集成在单个半导体管芯上。 天线调谐开关电路适于选择性地将输入端口耦合到集成地，以便改变连接的天线的一个或多个操作参数。 通过将分流开关与控制电路和集成接地单片集成，可以显着地改善天线调谐开关电路的导通状态阻抗和寄生OFF状态阻抗。
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公开(公告)号：US10528502B2
公开(公告)日：2020-01-07
申请号：US14659371
申请日：2015-03-16
Applicant: RF Micro Devices, Inc.
Inventor： Christopher Truong Ngo , Alexander Wayne Hietala , Christian Rye Iversen , Ruediger Bauder
IPC: G06F13/364
Abstract: Embodiments of bus interface systems are disclosed. In one embodiment, a bus interface system includes a master bus controller and a slave bus controller coupled along a bus line. The master bus controller is configured to generate an input data signal that is received by the slave bus controller along the bus line. The slave bus controller includes power conversion circuitry configured to convert the input data signal from the master bus controller into a supply voltage. By providing the power conversion circuitry, the slave bus controller is powered using the input data signal and without requiring an additional bus line to transfer a supply voltage to the slave bus controller.
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