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公开(公告)号:US12034036B2
公开(公告)日:2024-07-09
申请号:US17334030
申请日:2021-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggyu Song , Younsoo Kim , Haeryong Kim , Boeun Park , Eunha Lee , Jooho Lee , Hyangsook Lee , Yong-Hee Cho , Eunae Cho
CPC classification number: H01L28/65 , H01L28/56 , H01L29/0847
Abstract: A semiconductor device includes a lower electrode; an upper electrode disposed to be spaced apart from the lower electrode; and a dielectric layer disposed between the lower electrode and the upper electrode, and including a first metal oxide region, a second metal oxide region, and a third metal oxide region.
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公开(公告)号:US11935916B2
公开(公告)日:2024-03-19
申请号:US18154218
申请日:2023-01-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyangsook Lee , Junghwa Kim , Eunha Lee , Jeonggyu Song , Jooho Lee , Myoungho Jeong
CPC classification number: H01L28/55 , H01L21/02181 , H01L21/02189 , H01L21/02433 , H01L21/02516 , H01L21/02609 , H01L28/60 , H01L29/0847
Abstract: Provided are dielectric thin-film structures and electronic devices including the same. The dielectric thin-film structure includes a substrate, and a dielectric layer provided on the substrate. The dielectric layer including a tetragonal crystal structure, and crystal grains including a proportion of the crystal grains preferentially oriented such that at least one of a , , or direction of a crystal lattice is parallel to or forms an angle of less than 45 degrees an out-of-plane orientation.
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公开(公告)号:US09755179B2
公开(公告)日:2017-09-05
申请号:US15003845
申请日:2016-01-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yun Sung Woo , Jinyoung Hwang , Weonho Shin , Hyangsook Lee , Chan Kwak
CPC classification number: H01B3/18 , H01B1/02 , H01L51/0021 , H01L51/445 , H01L51/5212 , H01L51/5228 , Y02E10/549
Abstract: A conductor includes a plurality of metal nanostructures having a circular cross-sectional shape, where each of the metal nanostructure is surrounded by an organic material having a thickness of less than or equal to about 0.5 nm. A method of manufacturing a conductor includes preparing a metal nanostructure having a polygonal cross-sectional shape, and providing a metal nanostructure having a circular cross-sectional shape by supplying light to the metal nanostructure having a polygonal cross-sectional shape.
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公开(公告)号:US12077853B2
公开(公告)日:2024-09-03
申请号:US17132111
申请日:2020-12-23
Inventor: Hyangsook Lee , Hyoungsub Kim , Wonsik Ahn , Eunha Lee
IPC: C23C16/30 , C23C16/02 , C23C16/455 , H01L21/02 , H01L21/285
CPC classification number: C23C16/305 , C23C16/0281 , C23C16/45527 , C23C16/45553 , H01L21/02568 , H01L21/28568
Abstract: Provided are a method of growing a two-dimensional transition metal chalcogenide (TMC) film and a method of manufacturing a device including the two-dimensional TMC film. The method of growing a two-dimensional TMC film includes placing a metal layer having a predetermined pattern on a surface of a substrate; separately supplying a chalcogen precursor to a reaction chamber provided with the substrate; supplying a transition metal precursor to the reaction chamber; and evacuating the chalcogen precursor, the transition metal precursor, and by-products generated therefrom from the reaction chamber, wherein an amount of the chalcogen precursor and an amount of the transition metal precursor supplied to the reaction chamber may be controlled.
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公开(公告)号:US20230268385A1
公开(公告)日:2023-08-24
申请号:US18309407
申请日:2023-04-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sanghyun Jo , Eunha Lee , Jinseong Heo , Junghwa Kim , Hyangsook Lee , Seunggeol Nam
IPC: H01L29/06 , H01L23/29 , H01L29/423 , H01L29/66
CPC classification number: H01L29/0649 , H01L23/291 , H01L29/4236 , H01L29/66977
Abstract: An electronic device includes a dielectric layer including crystal grains having aligned crystal orientations the dielectric layer may be between a substrate and a gate electrode. The dielectric layer may be between isolated first and second electrodes. A method of manufacturing an electronic device may include preparing a substrate having a channel layer, forming the dielectric layer on the channel layer, and forming a gate electrode on the dielectric layer.
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公开(公告)号:US11522082B2
公开(公告)日:2022-12-06
申请号:US17001979
申请日:2020-08-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinseong Heo , Sangwook Kim , Yunseong Lee , Sanghyun Jo , Hyangsook Lee
Abstract: Provided are an electronic device and a method of manufacturing the same. The electronic device includes a ferroelectric crystallization layer between a substrate and a gate electrode and a crystallization prevention layer between the substrate and the ferroelectric crystallization layer. The ferroelectric crystallization layer is at least partially crystallized and includes a dielectric material having ferroelectricity or anti-ferroelectricity. Also, the crystallization prevention layer prevents crystallization in the ferroelectric crystallization layer from being spread toward the substrate.
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公开(公告)号:US11508929B2
公开(公告)日:2022-11-22
申请号:US16505710
申请日:2019-07-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dongjin Yun , Sunghoon Park , Seong Heon Kim , Hyangsook Lee , Woon Jung Paek , Youngnam Kwon , Yongsu Kim , Jaegwan Chung
Abstract: A conductor includes a plurality of metal nanostructures and an organic material, where a portion of the organic material surrounding each of the metal nanostructures is selectively removed, and the conductor has a haze of less than or equal to about 1.1, a light transmittance of greater than or equal to about 85% at about 550 nm, and a sheet resistance of less than or equal to about 100 Ω/sq. An electronic device includes the conductor, and a method of manufacturing a conductor includes preparing a conductive film including a metal nanostructure and an organic material, and selectively removing the organic material from the conductive film using a cluster ion beam sputtering.
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公开(公告)号:US11145731B2
公开(公告)日:2021-10-12
申请号:US16923514
申请日:2020-07-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Taehwan Moon , Eunha Lee , Junghwa Kim , Hyangsook Lee , Sanghyun Jo , Jinseong Heo
IPC: H01L21/02 , H01L29/423 , H01L21/28 , H01L27/108 , H01L49/02 , H01L29/51
Abstract: Provided are an electronic device including a dielectric layer having an adjusted crystal orientation and a method of manufacturing the electronic device. The electronic device includes a seed layer provided on a substrate and a dielectric layer provided on the seed layer. The seed layer includes crystal grains having aligned crystal orientations. The dielectric layer includes crystal grains having crystal orientations aligned in the same direction as the crystal orientations of the seed layer.
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