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公开(公告)号:US09905307B1
公开(公告)日:2018-02-27
申请号:US15246309
申请日:2016-08-24
Applicant: SanDisk Technologies LLC
Inventor: Ashish Ghai , Lakshmi Kalpana Vakati , Ekamdeep Singh , Chang Siau , Gopinath Balakrishnan , Kapil Verma
IPC: G11C16/34 , G11C16/04 , G11C16/16 , G11C16/08 , H01L27/11556 , H01L27/11582 , H01L27/24
CPC classification number: G11C16/3495 , G11C16/0483 , G11C16/08 , G11C16/16 , H01L27/11556 , H01L27/11582 , H01L27/2481
Abstract: Technology is described herein for detecting a leakage current between a block select line and a conductive region that exists in multiple blocks of memory cells in a plane. The conductive region may be shared by at least one memory cell in multiple blocks. One example of the conductive region is a common source line that includes one or more local source lines and one or more global source lines. If the leakage current were to become high enough, the electrical short between the conductive region and the block select line could cause a plane level failure. If the leakage current is less than an amount that would cause a plane failure, but that indicates that the non-volatile memory device is susceptible to a plane failure, data may be moved out of the plane before the plane failure occurs. Thus, data loss may be prevented.
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公开(公告)号:US20190130978A1
公开(公告)日:2019-05-02
申请号:US15799666
申请日:2017-10-31
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Daniel Linnen , Srikar Peesari , Kirubakaran Periyannan , Avinash Rajagiri , Shantanu Gupta , Jagdish Sabde , Ashish Ghai , Deepak Bharadwaj , Sukhminder Singh Lobana , Shrikar Bhagath
IPC: G11C16/10 , G11C16/04 , H01L27/11529 , H01L27/11573
Abstract: A partial memory die is missing one or more components. One example of a partial memory die includes an incomplete memory structure such that the partial memory die is configured to successfully perform programming, erasing and reading of the incomplete memory structure.
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公开(公告)号:US10249382B2
公开(公告)日:2019-04-02
申请号:US15683602
申请日:2017-08-22
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Dana Lee , Ekam Singh , Ashish Ghai , Kalpana Vakati
Abstract: Techniques are described for determining whether a non-volatile memory device is defective due to a word line that programs too fast, leading to an uncorrectable amount of data errors when programing data to the word line. In one set of examples, a set of memory cells are programmed by a series of voltage pulses applied along a word line without locking out the set of memory cells. A verify operation is then performed to see if the number of memory cells programmed above the verify level is too large and, if so, an error status is returned. In other examples, a lower limit on the number of voltage pulses needed to complete programming is introduced, and if the programming completes in less than this number of voltage pulses, an error status returned. A lower limit on the number of voltage pulses can be on a state by state basis or for all data states to complete.
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公开(公告)号:US20190066818A1
公开(公告)日:2019-02-28
申请号:US15683602
申请日:2017-08-22
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Dana Lee , Ekam Singh , Ashish Ghai , Kalpana Vakati
Abstract: Techniques are described for determining whether a non-volatile memory device is defective due to a word line that programs too fast, leading to an uncorrectable amount of data errors when programing data to the word line. In one set of examples, a set of memory cells are programmed by a series of voltage pulses applied along a word line without locking out the set of memory cells. A verify operation is then performed to see if the number of memory cells programmed above the verify level is too large and, if so, an error status is returned. In other examples, a lower limit on the number of voltage pulses needed to complete programming is introduced, and if the programming completes in less than this number of voltage pulses, an error status returned. A lower limit on the number of voltage pulses can be on a state by state basis or for all data states to complete.
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