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公开(公告)号：US09647679B1
公开(公告)日：2017-05-09
申请号：US15408890
申请日：2017-01-18
发明人： Akinobu Onishi
CPC分类号： H03M3/368 , H03M3/30 , H03M3/422 , H03M3/45 , H03M3/464 , H03M3/468 , H04R3/06 , H04R19/005 , H04R19/04 , H04R2201/003
摘要： Various embodiments of the present technology may comprise a method and device for a delta-sigma ADC. The method and device may comprise receiving an input signal to at least two parallel-connected first-stage integrators and corresponding feedback DACs, and simultaneously integrating the input signal by each of the first-stage integrators. The method and device may further comprise a second stage integrator connected in series with the first-stage integrators, a quantizer, and digital to analog converters, coupled between the output of the quantizer and the inputs of the first-stage integrators.
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公开(公告)号：US09874894B2
公开(公告)日：2018-01-23
申请号：US14936927
申请日：2015-11-10
发明人： Akinobu Onishi
IPC分类号： G05F3/26
CPC分类号： G05F3/262
摘要： A circuit for generating a constant current includes a first current generator that conducts a first current based upon a supply voltage and a resistive element and that generates a first mirrored current based on the current, a second current generator that generates a second current based on the first current wherein the second mirrored current decreases as the current increases and decreases as the current increases and a summing circuit for summing currents proportional to said first and second currents to generate an output current.
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公开(公告)号：US09692440B1
公开(公告)日：2017-06-27
申请号：US15160250
申请日：2016-05-20
发明人： Akinobu Onishi
摘要： An analog-to-digital conversion system, in some embodiments, comprises: a plurality of integrators coupled to each other, each of said integrators requiring a reference current; and a reference current generation circuit that generates said reference current for the plurality of integrators, the reference current is proportional to the square of the frequency of a clock signal of the reference current generation circuit.
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公开(公告)号：US09628101B1
公开(公告)日：2017-04-18
申请号：US15276943
申请日：2016-09-27
发明人： Akinobu Onishi
CPC分类号： H03M3/464 , H03M1/12 , H03M1/1245 , H03M1/183 , H03M1/185 , H03M1/46 , H03M3/422 , H03M3/452 , H03M3/484
摘要： Various embodiments of the present technology may comprise a method and apparatus for an analog-to digital converter (ADC). Methods and apparatus for an ADC according to various aspects of the present invention may operate in conjunction with a reference voltage that varies according to the frequency of a timing signal. By varying the reference voltage according to the frequency of the timing signal, the ADC generates a digital output having a substantially fixed voltage variation regardless of the frequency of the timing signal.
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