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公开(公告)号：US09553139B2
公开(公告)日：2017-01-24
申请号：US14609500
申请日：2015-01-30
发明人： Akinobu Onishi , Takashi Oomikawa
CPC分类号： H01L28/20 , H01L27/0629 , H01L27/0802 , H03F3/45475
摘要： In accordance with an embodiment, a semiconductor component and a method for manufacturing a semiconductor component are provided. A first dielectric material is formed over a body of semiconductor material of the first conductivity type and a plurality of semiconductor fingers are formed over the first of dielectric material. Semiconductor fingers of the plurality of semiconductor fingers spaced apart from each other and at least one of the semiconductor fingers has a first end spaced apart from a second end by a central region. A second dielectric material is formed over central region of the at least one semiconductor finger of the plurality of semiconductor fingers. An electrically conductive material is formed over the second dielectric material that is over the central region of the at least one semiconductor finger. The electrically conductive material serves as a shielding structure and the semiconductor material may be coupled to a fixed potential.
摘要翻译： 根据实施例，提供半导体部件和半导体部件的制造方法。 在第一导电类型的半导体材料的主体上形成第一介电材料，并且在第一介电材料上形成多个半导体指状物。 彼此间隔开的多个半导体指状物的半导体指状物和至少一个半导体指状物的第一端部具有通过中心区域与第二端部间隔开的第一端部。 第二介电材料形成在多个半导体指状物的至少一个半导体指状物的中心区域上。 在第二电介质材料之上形成导电材料，该材料位于至少一个半导体指状物的中心区域上方。 导电材料用作屏蔽结构，并且半导体材料可以耦合到固定电位。
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公开(公告)号：US20160225843A1
公开(公告)日：2016-08-04
申请号：US14609500
申请日：2015-01-30
发明人： Akinobu Onishi , Takashi Oomikawa
CPC分类号： H01L28/20 , H01L27/0629 , H01L27/0802 , H03F3/45475
摘要： In accordance with an embodiment, a semiconductor component and a method for manufacturing a semiconductor component are provided. A first dielectric material is formed over a body of semiconductor material of the first conductivity type and a plurality of semiconductor fingers are formed over the first of dielectric material. Semiconductor fingers of the plurality of semiconductor fingers spaced apart from each other and at least one of the semiconductor fingers has a first end spaced apart from a second end by a central region. A second dielectric material is formed over central region of the at least one semiconductor finger of the plurality of semiconductor fingers. An electrically conductive material is formed over the second dielectric material that is over the central region of the at least one semiconductor finger. The electrically conductive material serves as a shielding structure and the semiconductor material may be coupled to a fixed potential.
摘要翻译： 根据实施例，提供半导体部件和半导体部件的制造方法。 在第一导电类型的半导体材料的主体上形成第一介电材料，并且在第一介电材料上形成多个半导体指状物。 彼此间隔开的多个半导体指状物的半导体指状物和至少一个半导体指状物的第一端部具有通过中心区域与第二端部间隔开的第一端部。 第二介电材料形成在多个半导体指状物的至少一个半导体指状物的中心区域上。 在第二电介质材料之上形成导电材料，该材料位于至少一个半导体指状物的中心区域上方。 导电材料用作屏蔽结构，并且半导体材料可以耦合到固定电位。
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公开(公告)号：US10165356B1
公开(公告)日：2018-12-25
申请号：US15613437
申请日：2017-06-05
发明人： Akinobu Onishi
摘要： Various embodiments of the present technology may comprise methods and apparatus for controlling a bias voltage. Methods and apparatus for controlling a bias voltage to an electrical device according to various aspects of the present invention may operate in conjunction with a charge pump and a voltage regulator. A pulse generator may be employed to vary the output voltage of the voltage regulator, which in turn, varies the output voltage (bias voltage) generated by the charge pump. The pulse generator may be activated at the start-up of the electrical device.
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公开(公告)号：US09787320B1
公开(公告)日：2017-10-10
申请号：US15454381
申请日：2017-03-09
发明人： Akinobu Onishi
CPC分类号： H03M3/464 , H03M1/12 , H03M1/1245 , H03M1/183 , H03M1/185 , H03M1/46 , H03M3/422 , H03M3/452 , H03M3/484
摘要： Various embodiments of the present technology may comprise a method and apparatus for an analog-to digital converter (ADC). Methods and apparatus for an ADC according to various aspects of the present invention may operate in conjunction with a reference voltage that varies according to the frequency of a timing signal. By varying the reference voltage according to the frequency of the timing signal, the ADC generates a digital output having a substantially fixed voltage regardless of the frequency of the timing signal.
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公开(公告)号：US10951181B2
公开(公告)日：2021-03-16
申请号：US16150951
申请日：2018-10-03
发明人： Akinobu Onishi
摘要： Various embodiments of the present technology may comprise methods and apparatus for an amplifier circuit. Methods and apparatus for an amplifier circuit according to various aspects of the present invention may be utilized in a digital-to-analog converter. The amplifier circuit may comprise a first operational amplifier with a feedback circuit. The feedback circuit may comprise an inverting amplifier circuit.
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公开(公告)号：US10056915B2
公开(公告)日：2018-08-21
申请号：US14937175
申请日：2015-11-10
发明人： Akinobu Onishi
IPC分类号： H04B15/00 , H03M1/66 , H03M1/00 , H03M3/00 , H03M1/70 , H03M1/06 , H04R3/00 , H03F3/45 , H03F3/187
CPC分类号： H03M1/661 , H03F3/187 , H03F3/45475 , H03F2200/03 , H03F2203/45526 , H03M1/002 , H03M1/0626 , H03M1/70 , H03M3/32 , H03M3/344 , H03M3/502 , H03M3/508 , H03M3/51 , H04R3/00
摘要： A digital-to-analog converter (DAC) circuit includes a first DAC that produces a first analog output signal based upon a received multi-bit digital signal and upon a received clock. A second DAC that produces a second analog output signal based upon the received multi-bit digital signal and upon the received clock, wherein the first and second DACs are connected in parallel and process the same multi-bit digital signal. In one embodiment, the DACs produce differential signals. A low pass filter connected to receive the first and second analog outputs is configured to sum the first and second analog outputs and to filter the summed first and second analog outputs to produce an ingoing analog signal. An amplifier is connected to receive the ingoing analog signal to produce an amplified ingoing analog signal.
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公开(公告)号：US09641192B1
公开(公告)日：2017-05-02
申请号：US15181942
申请日：2016-06-14
发明人： Akinobu Onishi
IPC分类号： H03M3/00
CPC分类号： H03M3/368 , H03M3/30 , H03M3/422 , H03M3/45 , H03M3/464 , H03M3/468 , H04R3/06 , H04R19/005 , H04R19/04 , H04R2201/003
摘要： Various embodiments of the present technology may comprise a method and device for a delta-sigma ADC. The method and device may comprise receiving an input signal to at least two parallel-connected first-stage integrators and corresponding feedback DACs, and simultaneously integrating the input signal by each of the first-stage integrators. The method and device may further comprise a second stage integrator connected in series with the first-stage integrators, a quantizer, and digital to analog converters, coupled between the output of the quantizer and the inputs of the first-stage integrators.
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公开(公告)号：US11431348B2
公开(公告)日：2022-08-30
申请号：US17248840
申请日：2021-02-10
发明人： Abdullah Ahmed , Akinobu Onishi , Taichiro Kawai
摘要： A two-capacitor digital-to-analog converter circuit having circuitry to compensate for an unwanted capacitance is disclosed. The converter is configured to generate an average voltage on two capacitors for a sequence of bits in a digital word so that when the final bit is reached, the average voltage corresponds to an analog level of the digital word. The converter is configured to input and average the voltage on the two capacitors using different modes to minimize the effects of capacitor mismatch and switching capacitance on the accuracy of the conversion. The converter includes a buffer amp that has an input capacitance that can affect the conversion. Accordingly, the converter further includes capacitance compensation circuitry configured to provide a replica input capacitance that can be charged and discharged according to the bits of the digital word and coupled to the input capacitor to prevent the input capacitance from affecting the conversion.
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公开(公告)号：US10833641B2
公开(公告)日：2020-11-10
申请号：US16234729
申请日：2018-12-28
发明人： Akinobu Onishi
摘要： Various embodiments of the present technology may comprise methods and apparatus for an amplifier circuit. Methods and apparatus for an amplifier circuit according to various aspects of the present invention may comprise a first cross-connect circuit configured to receive an input signal at an input terminal and transmit the input signal to an input stage circuit. The amplifier circuit may further comprise a second cross-connect circuit connected between the input stage circuit and an output stage circuit, and a voltage adjustment circuit connected to the input stage circuit. Each cross-connect circuit may comprise a plurality of switches.
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公开(公告)号：US10757504B2
公开(公告)日：2020-08-25
申请号：US16197411
申请日：2018-11-21
发明人： Akinobu Onishi
摘要： Various embodiments of the present technology may comprise methods and apparatus for controlling a bias voltage. Methods and apparatus for controlling a bias voltage to an electrical device according to various aspects of the present invention may comprise a voltage regulator circuit to generate a first voltage, a clock driver circuit to generate a second voltage, and a charge pump system to generate the bias voltage and supply the bias voltage to the electrical device. The apparatus may be responsive to a control signal that indicates a startup operation of the electrical device.
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