公开(公告)号：US20240243204A1

公开(公告)日：2024-07-18

申请号：US18522543

申请日：2023-11-29

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI ,  Kouhei TOYOTAKA ,  Masashi TSUBUKU ,  Kosei NODA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  G06K19/077 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/088 ,  H01L27/12 ,  H01L29/24 ,  H01L29/26 ,  H01L29/66 ,  G11C7/00 ,  G11C19/28 ,  H02M3/07

CPC classification number: H01L29/78609 ,  G06K19/07758 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/0883 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/26 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  G11C7/00 ,  G11C19/28 ,  H01L2223/6677 ,  H02M3/07

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor, With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US20230411410A1

公开(公告)日：2023-12-21

申请号：US18239928

申请日：2023-08-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC: H01L27/12 ,  G09G3/20 ,  G09G3/3291 ,  H01L29/786 ,  H03K19/003 ,  H03K19/096 ,  G11C19/28 ,  H03K17/16 ,  G09G3/36 ,  G11C19/18

CPC classification number: H01L27/1255 ,  G09G3/3233 ,  G09G3/3291 ,  H01L27/1225 ,  H01L29/7869 ,  H01L27/1222 ,  H03K19/00315 ,  H03K19/096 ,  G09G3/2092 ,  G11C19/28 ,  H03K17/161 ,  G09G3/36 ,  G11C19/184 ,  H01L27/124 ,  G09G3/20

Abstract: To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.

公开(公告)号：US20210143281A1

公开(公告)日：2021-05-13

申请号：US17010151

申请日：2020-09-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI ,  Kouhei TOYOTAKA ,  Masashi TSUBUKU ,  Kosei NODA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/26 ,  G06K19/077 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/088 ,  H01L29/24 ,  H01L29/66

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US20180174891A1

公开(公告)日：2018-06-21

申请号：US15895466

申请日：2018-02-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka SHIONOIRI ,  Kosei NODA

IPC: H01L21/762 ,  H01L27/12 ,  H01L27/06

CPC classification number: H01L21/76254 ,  H01L27/0688 ,  H01L27/1225

Abstract: An object is to provide a semiconductor device with reduced standby power. A transistor including an oxide semiconductor as an active layer is used as a switching element, and supply of a power supply voltage to a circuit in an integrated circuit is controlled by the switching element. Specifically, when the circuit is in an operation state, supply of the power supply voltage to the circuit is performed by the switching element, and when the circuit is in a stop state, supply of the power supply voltage to the circuit is stopped by the switching element. In addition, the circuit supplied with the power supply voltage includes a semiconductor element which is a minimum unit included in an integrated circuit formed using a semiconductor. Further, the semiconductor included in the semiconductor element contains silicon having crystallinity (crystalline silicon).

公开(公告)号：US20170271519A1

公开(公告)日：2017-09-21

申请号：US15605211

申请日：2017-05-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari SASAKI ,  Hitomi SATO ,  Kosei NODA ,  Yuta ENDO ,  Mizuho IKARASHI ,  Keitaro IMAI ,  Atsuo ISOBE ,  Yutaka OKAZAKI

IPC: H01L29/786 ,  H01L29/66

Abstract: It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

公开(公告)号：US20170256547A1

公开(公告)日：2017-09-07

申请号：US15601154

申请日：2017-05-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kosei NODA ,  Yuta ENDO

IPC: H01L27/108 ,  H01L21/02 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L27/10873 ,  H01L21/02554 ,  H01L21/02565 ,  H01L27/10805 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor memory device includes a transistor and a capacitor. The transistor includes: an insulating film in which a groove portion is provided; a pair of electrodes separated so that the groove portion is sandwiched therebetween; an oxide semiconductor film which is in contact with the pair of electrodes and side surfaces and a bottom surface of the groove portion and has a thickness value smaller than a depth value of the groove portion; a gate insulating film covering the oxide semiconductor film; and a gate electrode provided to overlap with the oxide semiconductor film with the gate insulating film positioned therebetween.

公开(公告)号：US20170004788A1

公开(公告)日：2017-01-05

申请号：US15264014

申请日：2016-09-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Ryo ARASAWA ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC: G09G3/36 ,  H01L27/12 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/1335

CPC classification number: G09G3/3614 ,  G02F1/133553 ,  G02F1/13439 ,  G02F1/1368 ,  G02F2201/123 ,  G02F2202/10 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/08 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  H01L21/02164 ,  H01L21/02266 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/467 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

Abstract: In a liquid crystal display device including a plurality of pixels in a display portion and configured to performed display in a plurality of frame periods, each of the frame periods includes a writing period and a holding period, and after an image signal is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period. The pixel includes a semiconductor layer including an oxide semiconductor layer, and the oxide semiconductor layer has a carrier concentration of less than 1×1014/cm3.

Abstract translation: 在包括显示部分中的多个像素并且被配置为在多个帧周期中进行显示的液晶显示装置中，每个帧周期包括写入周期和保持周期，并且在将图像信号输入到每个 在所述写入周期中的所述多个像素中，包括在所述多个像素中的每一个中的晶体管被​​截止，并且所述图像信号在所述保持周期中保持至少30秒。 像素包括具有氧化物半导体层的半导体层，氧化物半导体层的载流子浓度小于1×10 14 / cm 3。

公开(公告)号：US20160232868A1

公开(公告)日：2016-08-11

申请号：US15134937

申请日：2016-04-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Ryo ARASAWA ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC: G09G3/36 ,  H01L27/12 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66 ,  H01L29/24 ,  H01L21/467 ,  H01L21/477 ,  H01L29/786 ,  H01L21/02

CPC classification number: G09G3/3614 ,  G02F1/133553 ,  G02F1/13439 ,  G02F1/1368 ,  G02F2201/123 ,  G02F2202/10 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/08 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  H01L21/02164 ,  H01L21/02266 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/467 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

Abstract: In a liquid crystal display device including a plurality of pixels in a display portion and configured to performed display in a plurality of frame periods, each of the frame periods includes a writing period and a holding period, and after an image signal is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period. The pixel includes a semiconductor layer including an oxide semiconductor layer, and the oxide semiconductor layer has a carrier concentration of less than 1×1014/cm3.

Abstract translation: 在包括显示部分中的多个像素并且被配置为在多个帧周期中进行显示的液晶显示装置中，每个帧周期包括写入周期和保持周期，并且在将图像信号输入到每个 在所述写入周期中的所述多个像素中，包括在所述多个像素中的每一个中的晶体管被​​截止，并且所述图像信号在所述保持周期中保持至少30秒。 像素包括具有氧化物半导体层的半导体层，氧化物半导体层的载流子浓度小于1×10 14 / cm 3。

公开(公告)号：US20160155849A1

公开(公告)日：2016-06-02

申请号：US14949959

申请日：2015-11-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kosei NODA

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/425 ,  H01L29/24

Abstract: A semiconductor device with stable electrical characteristics is provided. Alternatively, a semiconductor device having normally-off electrical characteristics is provided. A semiconductor device includes a gate electrode, a gate insulator, and an oxide semiconductor, the oxide semiconductor contains fluorine in a channel formation region, and a fluorine concentration in the channel formation region is higher than or equal to 1×1020 atoms/cm3 and lower than or equal to 1×1022 atoms/cm3. Note that fluorine is added by an ion implantation method.

Abstract translation: 提供具有稳定电特性的半导体器件。 或者，提供具有常关电特性的半导体器件。 半导体器件包括栅电极，栅绝缘体和氧化物半导体，氧化物半导体在沟道形成区域含有氟，沟道形成区中的氟浓度高于或等于1×1020原子/ cm3， 低于或等于1×1022原子/ cm3。 注意，通过离子注入法加入氟。

公开(公告)号：US20150325701A1

公开(公告)日：2015-11-12

申请号：US14704123

申请日：2015-05-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kosei NODA

IPC: H01L29/786 ,  H01L29/24

CPC classification number: H01L29/24 ,  H01L27/0886 ,  H01L27/1225 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78621 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device with favorable electrical characteristics is provided. Alternatively, a semiconductor device with a high on-state current is provided. Alternatively, a semiconductor device that is suitable for miniaturization is provided. A semiconductor device includes an oxide semiconductor, an insulating film, a gate insulating film, and a gate electrode. The oxide semiconductor includes a first portion and a second portion over the first portion. The insulating film includes a region in contact with a side surface of the first portion. The gate electrode includes a region that covers the second portion with the gate insulating film provided therebetween.

Abstract translation: 提供了具有良好电气特性的半导体器件。 或者，提供具有高导通电流的半导体器件。 或者，提供适合于小型化的半导体器件。 半导体器件包括氧化物半导体，绝缘膜，栅极绝缘膜和栅电极。 氧化物半导体包括在第一部分上的第一部分和第二部分。 绝缘膜包括与第一部分的侧表面接触的区域。 栅电极包括覆盖第二部分的区域，其间设置有栅极绝缘膜。