公开(公告)号：US20130214398A1

公开(公告)日：2013-08-22

申请号：US13846014

申请日：2013-03-18

Applicant: STATS CHIPPAC, LTD.

Inventor： Reza A. Pagaila ,  Dioscoro A. Merilo

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/538

CPC classification number: H01L23/562 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L23/495 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/5384 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a base substrate with first and second opposing surfaces. A first etch-resistant conductive layer is formed over the first surface of the base substrate. A second etch-resistant conductive layer is formed over the second surface of the base substrate. A first semiconductor die has bumps formed over contact pads on an active surface of the first die. The first die is mounted over a first surface of the first conductive layer. An encapsulant is deposited over the first die and base substrate. A portion of the base substrate is removed to form electrically isolated base leads between opposing portions of the first and second conductive layers. A second semiconductor die is mounted over the encapsulant and a second surface of the first conductive layer between the base leads. A height of the base leads is greater than a thickness of the second die.

Abstract translation: 半导体器件具有带有第一和第二相对表面的基底基板。 在基底基板的第一表面上形成第一耐蚀刻导电层。 第二耐蚀刻导电层形成在基底衬底的第二表面上。 第一半导体管芯具有形成在第一管芯的有效表面上的接触焊盘上的凸起。 第一管芯安装在第一导电层的第一表面上。 密封剂沉积在第一管芯和基底衬底上。 去除基底衬底的一部分以在第一和第二导电层的相对部分之间形成电隔离的底部引线。 第二半导体管芯安装在密封剂上方，第一导电层的第二表面位于基底引线之间。 基部引线的高度大于第二管芯的厚度。

公开(公告)号：US09589910B2

公开(公告)日：2017-03-07

申请号：US13846014

申请日：2013-03-18

Applicant: STATS ChipPAC, Ltd.

Inventor： Reza A. Pagaila ,  Dioscoro A. Merilo

IPC: H01L23/488 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/495 ,  H01L25/065 ,  H01L25/00 ,  H01L23/538 ,  H01L25/10

CPC classification number: H01L23/562 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L23/495 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/5384 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a base substrate with first and second opposing surfaces. A first etch-resistant conductive layer is formed over the first surface of the base substrate. A second etch-resistant conductive layer is formed over the second surface of the base substrate. A first semiconductor die has bumps formed over contact pads on an active surface of the first die. The first die is mounted over a first surface of the first conductive layer. An encapsulant is deposited over the first die and base substrate. A portion of the base substrate is removed to form electrically isolated base leads between opposing portions of the first and second conductive layers. A second semiconductor die is mounted over the encapsulant and a second surface of the first conductive layer between the base leads. A height of the base leads is greater than a thickness of the second die.

Abstract translation: 半导体器件具有带有第一和第二相对表面的基底基板。 在基底基板的第一表面上形成第一耐蚀刻导电层。 第二耐蚀刻导电层形成在基底衬底的第二表面上。 第一半导体管芯具有形成在第一管芯的有效表面上的接触焊盘上的凸起。 第一管芯安装在第一导电层的第一表面上。 密封剂沉积在第一管芯和基底衬底上。 去除基底衬底的一部分以在第一和第二导电层的相对部分之间形成电隔离的底部引线。 第二半导体管芯安装在密封剂上方，第一导电层的第二表面位于基底引线之间。 基部引线的高度大于第二管芯的厚度。