公开(公告)号：US20140332955A1

公开(公告)日：2014-11-13

申请号：US14340436

申请日：2014-07-24

Applicant: STATS ChipPAC, Ltd.

Inventor： Zigmund R. Camacho ,  Dioscoro A. Merilo ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

IPC: H01L23/00 ,  H01L23/28

CPC classification number: H01L24/11 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68372 ,  H01L2224/16145 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/48247 ,  H01L2224/4899 ,  H01L2224/49 ,  H01L2224/731 ,  H01L2224/732 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/8101 ,  H01L2224/81011 ,  H01L2224/81194 ,  H01L2224/81801 ,  H01L2224/81986 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2224/85951 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/37 ,  H01L2924/37001 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/3512 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2224/13 ,  H01L2224/45 ,  H01L2924/00012

Abstract: A method of manufacture of an integrated circuit package system includes: attaching a first die to a first die pad; connecting electrically a second die to the first die through a die interconnect positioned between the first die and the second die; connecting a first lead adjacent the first die pad to the first die; connecting a second lead to the second die, the second lead opposing the first lead and adjacent the second die; and providing a molding material around the first die, the second die, the die interconnect, the first lead and the second lead, with a portion of the first lead exposed.

Abstract translation: 集成电路封装系统的制造方法包括：将第一管芯附接到第一管芯焊盘; 通过位于所述第一管芯和所述第二管芯之间的管芯互连件将第二管芯电连接到所述第一管芯; 将与所述第一管芯焊盘相邻的第一引线连接到所述第一管芯; 将第二引线连接到所述第二管芯，所述第二引线与所述第一引线相对并且邻近所述第二管芯; 以及在所述第一裸片，所述第二裸片，芯片互连，所述第一引线和所述第二引线周围提供模制材料，所述第一引线的一部分被暴露。