公开(公告)号：US20190035669A1

公开(公告)日：2019-01-31

申请号：US15663624

申请日：2017-07-28

Applicant: STMicroelectronics, Inc.

Inventor： Jefferson TALLEDO

IPC: H01L21/683 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065

Abstract: According to principles as taught herein, a leadframe array for a semiconductor die is prepared having locations to receive solder balls. Solder balls are then applied to the leadframe array, after which the leadframe array and solder ball combination is placed in a first mold and encased in a first molding compound. After the molding compound is cured, a layer of molding compound is removed to expose the solder balls. After this, a semiconductor die is electrically connected to the exposed solder balls. The combined semiconductor die and leadframe are placed in a second mold, and a second molding compound injected. The second molding compound flows around the semiconductor die and leadframe combination, fully enclosing the electrical connections between the leadframe and the semiconductor die, making the final package a twice-molded configuration. After this, the twice-molded semiconductor package array is cut at the appropriate locations to singulate the packages into individual products.

公开(公告)号：US20170141014A1

公开(公告)日：2017-05-18

申请号：US14945291

申请日：2015-11-18

Applicant: STMICROELECTRONICS, INC.

Inventor： Ela Mia CADAG ,  Jefferson TALLEDO

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/4952 ,  H01L21/4828 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4951 ,  H01L23/49548 ,  H01L23/49568 ,  H01L23/49582 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81002 ,  H01L2224/81986 ,  H01L2224/83002 ,  H01L2224/83101 ,  H01L2224/83385 ,  H01L2224/83986 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/157 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/13099 ,  H01L2924/00

Abstract: One or more embodiments are directed to semiconductor packages having an integrated heatsink and methods of forming same. In one embodiment, a package includes a plurality of leads that support and enclose periphery portions of the semiconductor die. The leads have first and second, opposing surfaces that form outer surfaces of the package. The first surface of the leads may form a heatsink and the second surface of the leads form lands of the package for coupling to another device, substrate, or board. The package includes encapsulation material that surrounds the semiconductor die and located between upper portions of the leads. The package further includes a back filling material (or insulating material) that is below the semiconductor die and between lower portions of the leads.

公开(公告)号：US20230275008A1

公开(公告)日：2023-08-31

申请号：US18169146

申请日：2023-02-14

Applicant: STMicroelectronics, Inc.

Inventor： Jefferson TALLEDO

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49558 ,  H01L23/3121 ,  H01L23/49513 ,  H01L21/4821 ,  H01L21/568 ,  H01L24/32

Abstract: The present disclosure is directed to a package having a die on a die pad that has a first portion and a second portion, the second portion being larger than the first portion in a first direction. The package includes a plurality of leads, where at least a first lead has a first surface coplanar with a first, lower surface of the first portion of the die pad. The first lead having a second surface that is transverse to the first surface of the first lead. The second surface being an external surface of the lead and package. The second portion of the die pad being an extension that is overlapping the first lead.

公开(公告)号：US20210265245A1

公开(公告)日：2021-08-26

申请号：US17317818

申请日：2021-05-11

Applicant: STMicroelectronics, Inc.

Inventor： Rennier RODRIGUEZ ,  Maiden Grace MAMING ,  Jefferson TALLEDO

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/00

Abstract: The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.

公开(公告)号：US20210183750A1

公开(公告)日：2021-06-17

申请号：US17185742

申请日：2021-02-25

Applicant: STMicroelectronics, Inc.

Inventor： Rennier RODRIGUEZ ,  Aiza Marie AGUDON ,  Jefferson TALLEDO ,  Moonlord MANALO ,  Ela Mia CADAG ,  Rammil SEGUIDO

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.

公开(公告)号：US20180286789A1

公开(公告)日：2018-10-04

申请号：US15952068

申请日：2018-04-12

Applicant: STMicroelectronics, Inc.

Inventor： Jefferson TALLEDO ,  Tito MANGAOANG

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L21/78

CPC classification number: H01L23/4952 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/4832 ,  H01L21/561 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/09 ,  H01L24/11 ,  H01L24/17 ,  H01L24/27 ,  H01L24/32 ,  H01L24/46 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/92125

Abstract: The present disclosure is directed to a leadframe package having a side solder ball contact and methods of manufacturing the same. A plurality of solder balls are coupled to recesses in a leadframe before encapsulation and singulation. After singulation, a portion of each solder ball is exposed on sidewalls of the package. This ensures that the sidewalls of the leads are solder wettable, which allows for the formation of stronger joints when the package is coupled to a substrate. This increased adhesion reduces resistance at the joints and also mitigates the effects of expansion of the components in the package such that delamination is less likely to occur. As a result, packages with a side solder ball contact have increased life cycle expectancies.

公开(公告)号：US20170162479A1

公开(公告)日：2017-06-08

申请号：US14957785

申请日：2015-12-03

Applicant: STMICROELECTRONICS, INC.

Inventor： Jefferson TALLEDO ,  Rammil SEGUIDO

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L23/49531 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49568 ,  H01L23/49575 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4918 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor device may include a circuit board having an opening, and a frame. The frame may have an IC die pad in the opening, and arms extending outwardly from the IC die pad and coupled to the circuit board. The semiconductor device may include an IC mounted on the IC die pad, bond wires coupling the circuit board with the IC, and encapsulation material surrounding the IC, the bond wires, and the arms.

公开(公告)号：US20150348891A1

公开(公告)日：2015-12-03

申请号：US14293274

申请日：2014-06-02

Applicant: STMICROELECTRONICS, INC.

Inventor： Jefferson TALLEDO

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L24/49 ,  H01L21/4832 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/32245 ,  H01L2224/48096 ,  H01L2224/48097 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/8385 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/2064 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A method for making a semiconductor device may include bonding a top lead frame component, having recesses, with a bottom lead frame component to form a lead frame, the top and bottom lead frame components each including metal. The method may include mounting an IC on the lead frame, encapsulating the IC and the lead frame, and removing portions of the bottom lead frame component to define contacts for the IC.

Abstract translation: 制造半导体器件的方法可以包括将具有凹陷的顶部引线框架部件与底部引线框架部件接合以形成引线框架，所述顶部和底部引线框架部件各自包括金属。 该方法可以包括将IC安装在引线框架上，封装IC和引线框架，以及去除底部引线框架部件的部分以限定用于IC的触点。