公开(公告)号：US09412771B2

公开(公告)日：2016-08-09

申请号：US14793966

申请日：2015-07-08

Applicant: Samsung Display Co., Ltd

Inventor： Soyoung Koo ,  Myounghwa Kim ,  Sangho Park ,  Jun Hyung Lim ,  Masataka Kano

IPC: H01L21/00 ,  H01L27/12 ,  H01L29/66 ,  H01L21/02 ,  H01L21/477 ,  H01L29/24

CPC classification number: H01L27/1262 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02664 ,  H01L21/477 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78693 ,  H01L2227/323

Abstract: A method of manufacturing a thin film transistor and a method of manufacturing a display substrate having the same are disclosed. In one aspect, the method of manufacturing a thin film transistor comprises forming an oxide semiconductor layer over a substrate, plasma-treating the oxide semiconductor layer with a plasma generated from a nitrogen gas or a nitric oxide gas so as to decrease defects in the oxide semiconductor layer, and annealing the plasma-treated oxide semiconductor layer to form a channel layer.

Abstract translation: 公开了一种薄膜晶体管的制造方法及其制造方法。 一方面，制造薄膜晶体管的方法包括在衬底上形成氧化物半导体层，用由氮气或一氧化氮气体产生的等离子体等离子体处理氧化物半导体层，以减少氧化物中的缺陷 并且等离子体处理的氧化物半导体层退火以形成沟道层。

公开(公告)号：US12225794B2

公开(公告)日：2025-02-11

申请号：US18373277

申请日：2023-09-27

Applicant: Samsung Display Co., Ltd.

Inventor： Soyoung Koo ,  Eoksu Kim ,  Hyungjun Kim ,  Yunyong Nam ,  Junhyung Lim ,  Kyungjin Jeon

IPC: H10K59/131 ,  G09G3/3266 ,  G09G3/3291 ,  H10K59/122 ,  H10K59/12

Abstract: A display apparatus is disclosed that includes contact holes formed to expose at least a portion of a conductive layer or a semiconductor layer without damage to the surface of the conductive layer or the semiconductor layer, and a method of manufacturing the display apparatus. The display apparatus includes a substrate, a conductive mound arranged on the substrate, a first insulating mound arranged on the substrate, and a semiconductor layer including a first region arranged on the conductive mound, and a second region arranged on the first insulating mound. The second region of the semiconductor layer substantially covers an upper surface of the first insulating mound.

公开(公告)号：US12225771B2

公开(公告)日：2025-02-11

申请号：US17318350

申请日：2021-05-12

Applicant: Samsung Display Co., Ltd.

Inventor： Hyungjun Kim ,  Soyoung Koo ,  Eok Su Kim ,  Yunyong Nam ,  Jun Hyung Lim ,  Kyungjin Jeon

IPC: H10K59/121 ,  H10K59/126 ,  H10K71/00 ,  H10K59/12 ,  H10K59/123

Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.

公开(公告)号：US20240324339A1

公开(公告)日：2024-09-26

申请号：US18429437

申请日：2024-02-01

Applicant: Samsung Display Co., Ltd.

Inventor： Yunyong Nam ,  Soyoung Koo ,  Eoksu Kim ,  Hyungjun Kim

IPC: H10K59/131 ,  G09G3/3233

CPC classification number: H10K59/131 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0842

Abstract: A display apparatus includes a substrate including a display area, in which a plurality of pixels are arranged, and a peripheral area outside the display area, a data line arranged in the display area and extending in a first direction, a first semiconductor pattern disposed on the data line and extending in a second direction crossing the first direction, a gate line disposed on the first semiconductor pattern and extending in the first direction to cross the first semiconductor pattern, and an anchor located at an end portion of the gate line and having a width greater than a width of the gate line.

公开(公告)号：US11574987B2

公开(公告)日：2023-02-07

申请号：US17223505

申请日：2021-04-06

Applicant: Samsung Display Co., LTD.

Inventor： Kyungjin Jeon ,  Soyoung Koo ,  Eok Su Kim ,  Hyungjun Kim ,  Yunyong Nam ,  Jun Hyung Lim

IPC: H01L27/32

Abstract: An electronic apparatus includes a first transistor including a first oxide semiconductor pattern, a second transistor including a second oxide semiconductor pattern, a blocking layer including a conductive material, a signal line including a first line and a second line which are disposed on different layers, and a bridge pattern electrically connected to each of the first transistor, the first line of the signal line, and the second line of the signal line, wherein the first line of the signal line and the blocking layer are disposed on a same layer, and the second line of the signal line and the first oxide semiconductor pattern are disposed on a same layer.

公开(公告)号：US20210242291A1

公开(公告)日：2021-08-05

申请号：US17081342

申请日：2020-10-27

Applicant: Samsung Display Co., Ltd.

Inventor： Kyungjin Jeon ,  Soyoung Koo ,  Eoksu Kim ,  Junhyung Lim

IPC: H01L27/32

Abstract: A display apparatus includes a thin film transistor facing a substrate with a buffer layer therebetween and including a semiconductor layer, a channel region, a source region, a drain region, and a gate electrode; a conductive pattern between the substrate and the semiconductor layer and connected to the semiconductor layer, the conductive pattern facing the semiconductor layer with the buffer layer therebetween; a contact hole in the buffer layer and exposing the conductive pattern to outside the buffer layer; and a display element which is electrically connected to the thin film transistor. The source region or the drain region extends through the contact hole in the buffer layer, to contact the conductive pattern and connect the semiconductor layer to the conductive pattern.

公开(公告)号：US09263470B1

公开(公告)日：2016-02-16

申请号：US14585525

申请日：2014-12-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Dongjo Kim ,  Myounggeun Cha ,  Yoonho Khang ,  Soyoung Koo

IPC: H01L21/00 ,  H01L27/12 ,  H01L29/786 ,  H01L21/02 ,  H01L27/32

CPC classification number: H01L27/1218 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02494 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02686 ,  H01L27/1222 ,  H01L29/66757 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78654 ,  H01L29/78675

Abstract: Provided is a semiconductor device including a buffer layer that is on a substrate and includes an inclined surface; a crystalline silicon layer that is on the buffer layer; a gate electrode that is on the crystalline silicon layer while being insulated from the crystalline silicon layer; and a source electrode and a drain electrode that are each electrically connected to the crystalline silicon layer, the angle between the substrate and the inclined surface being in a range of about 17.5 degrees to less than about 70 degrees.

Abstract translation: 本发明提供一种半导体器件，其包括在衬底上并包括倾斜表面的缓冲层; 位于缓冲层上的晶体硅层; 位于结晶硅层上同时与晶体硅层绝缘的栅电极; 以及源极电极和漏极电极，其电连接到晶体硅层，基板和倾斜表面之间的角度在约17.5度至小于约70度的范围内。