公开(公告)号：US12218151B2

公开(公告)日：2025-02-04

申请号：US18480494

申请日：2023-10-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： So Young Koo ,  Jay Bum Kim ,  Kyung Jin Jeon ,  Eok Su Kim ,  Jun Hyung Lim

IPC: H01L33/62 ,  H01L27/12

Abstract: A display device according to an embodiment of the present disclosure includes: a substrate; a first conductive layer on the substrate; a first insulating layer on the first conductive layer; an active pattern on the first insulating layer and including a semiconductor material; a second insulating layer on the active pattern; and a second conductive layer on the second insulating layer, wherein the first insulating layer has a first opening exposing the first conductive layer, the second insulating layer has a second opening exposing the first conductive layer, a breadth of the first opening is different than a breadth of the second opening, and a side surface of the first opening and a side surface of the second opening are formed to a top surface of the first conductive layer.

公开(公告)号：US11626426B2

公开(公告)日：2023-04-11

申请号：US17109601

申请日：2020-12-02

Applicant: Samsung Display Co., Ltd.

Inventor： Kyung Jin Jeon ,  So Young Koo ,  Eok Su Kim ,  Hyung Jun Kim ,  Joon Seok Park ,  Jun Hyung Lim

IPC: H01L27/14 ,  H01L27/12 ,  H01L27/32

Abstract: A display device includes: a substrate; a first conductive layer on the substrate and comprising a first signal line; an insulating layer pattern on the first conductive layer; a semiconductor pattern on the insulating layer pattern; a gate insulating layer on the semiconductor pattern; and a second conductive layer comprising a gate electrode on the gate insulting layer and a first source/drain electrode and a second source/drain electrode, each on at least a part of the semiconductor pattern, wherein the insulating layer pattern and the semiconductor pattern have a same planar shape, the semiconductor pattern comprises a channel region overlapping the gate electrode, a first source/drain region on a first side of the channel region and a second source/drain region on a second side of the channel region, and the first source/drain electrode electrically connects the first source/drain region and the first signal line.

公开(公告)号：US11594559B2

公开(公告)日：2023-02-28

申请号：US17157184

申请日：2021-01-25

Applicant: Samsung Display Co., LTD.

Inventor： Joon Seok Park ,  So Young Koo ,  Eok Su Kim ,  Hyung Jun Kim ,  Sang Woo Sohn ,  Jun Hyung Lim ,  Kyung Jin Jeon

IPC: H01L27/00 ,  H01L29/00 ,  H01L27/12

Abstract: A display device may include a first gate electrode disposed on a substrate, a buffer layer disposed on the first gate electrode, a first active pattern on the buffer layer, the first active pattern overlapping the first gate electrode and including an oxide semiconductor, a second active pattern on the buffer layer, spaced apart from the first active pattern, and including an oxide semiconductor, the second active pattern including a channel region, and a source region and a drain region, a source pattern and a drain pattern respectively at ends of the first active pattern, a first insulation pattern disposed on the first active pattern, a second insulation pattern disposed on the channel region, a first oxygen supply pattern on the first insulation pattern, a second oxygen supply pattern on the second insulation pattern, and a second gate electrode on the second oxygen supply pattern.

公开(公告)号：US12125836B2

公开(公告)日：2024-10-22

申请号：US18395966

申请日：2023-12-26

Applicant: Samsung Display Co., LTD.

Inventor： Kyung Jin Jeon ,  So Young Koo ,  Eok Su Kim ,  Hyung Jun Kim ,  Yun Yong Nam ,  Jun Hyung Lim

IPC: H01L25/16 ,  H01L27/12 ,  H10K59/122 ,  H10K59/123

CPC classification number: H01L25/167 ,  H01L27/124 ,  H01L27/1259 ,  H10K59/122 ,  H10K59/123

Abstract: A display device includes a first conductive layer disposed on a substrate, a passivation layer disposed on the first conductive layer, a second conductive layer disposed on the passivation layer, a via layer disposed on the second conductive layer, a third conductive layer disposed on the via layer, the third conductive layer including a first electrode, a second electrode, a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other, and a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer and the passivation layer.

公开(公告)号：US12107114B2

公开(公告)日：2024-10-01

申请号：US17471679

申请日：2021-09-10

Applicant: Samsung Display Co., LTD.

Inventor： Hyung Jun Kim ,  So Young Koo ,  Eok Su Kim ,  Yun Yong Nam ,  Jun Hyung Lim ,  Kyung Jin Jeon

IPC: H01L27/15 ,  H01L33/24 ,  H01L33/38 ,  H01L33/44 ,  H01L33/60

CPC classification number: H01L27/156 ,  H01L33/24 ,  H01L33/38 ,  H01L33/44 ,  H01L33/60

Abstract: A display device includes first banks on a substrate and spaced apart from each other, a first electrode and a second electrode on the first banks and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, and light emitting elements on the first insulating layer and each having ends on the first electrode and the second electrode. Each of the first banks includes a first pattern portion including concave portions and convex portions. The first pattern portions of the first banks are disposed on side surfaces of the first banks. The side surfaces are spaced apart and face each other. Each of the first electrode and the second electrode includes a second pattern portion on the first pattern portion and having a pattern shape corresponding to the first pattern portion on a surface thereof.

公开(公告)号：US12068334B2

公开(公告)日：2024-08-20

申请号：US17039474

申请日：2020-09-30

Applicant: Samsung Display Co., LTD.

Inventor： Kyung Jin Jeon ,  Eok Su Kim ,  Joon Seok Park ,  So Young Koo ,  Tae Sang Kim ,  Jun Hyung Lim

IPC: H01L27/12

CPC classification number: H01L27/1255 ,  H01L27/1288 ,  H01L27/1225 ,  H01L27/124

Abstract: According to some embodiments of the present disclosure, a display device includes an active pattern including a metal oxide, a gate electrode overlapping the active pattern, a first capacitor electrode spaced apart from the active pattern and including a conductive oxide, and a second capacitor electrode on the first capacitor electrode.

公开(公告)号：US11600682B2

公开(公告)日：2023-03-07

申请号：US17074323

申请日：2020-10-19

Applicant: Samsung Display Co., Ltd.

Inventor： Kyung Jin Jeon ,  So Young Koo ,  Eok Su Kim ,  Hyung Jun Kim ,  Jun Hyung Lim

IPC: H01L27/32 ,  H01L27/12 ,  H01L51/56

Abstract: A display device and a method of driving a display device are provided. A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern, a buffer layer on the first conductive layer, a semiconductor layer including a semiconductor pattern on the buffer layer, a gate insulating layer on the semiconductor pattern, a second conductive layer including a gate electrode on the gate insulating layer, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including a first conductive pattern electrically coupling the lower light blocking pattern to the semiconductor pattern, wherein the first conductive pattern is coupled to the lower light blocking pattern through a first contact hole passing through the planarization layer and the buffer layer, and coupled to the semiconductor pattern through a second contact hole passing through the planarization layer.

公开(公告)号：US09991287B2

公开(公告)日：2018-06-05

申请号：US15478386

申请日：2017-04-04

Applicant: Samsung Display Co., Ltd.

Inventor： Ji Hun Lim ,  Jong Baek Seon ,  Kyoung Seok Son ,  Eok Su Kim ,  Tae Sang Kim

IPC: H01L29/78 ,  H01L29/66 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/7869

Abstract: A thin film transistor array panel includes: a substrate; a semiconductor layer disposed on the substrate; a gate electrode disposed on the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer to not overlap the gate electrode, wherein a first edge of the gate electrode is aligned with a second edge of the semiconductor layer in a direction that is perpendicular to the substrate.

公开(公告)号：US12225771B2

公开(公告)日：2025-02-11

申请号：US17318350

申请日：2021-05-12

Applicant: Samsung Display Co., Ltd.

Inventor： Hyungjun Kim ,  Soyoung Koo ,  Eok Su Kim ,  Yunyong Nam ,  Jun Hyung Lim ,  Kyungjin Jeon

IPC: H10K59/121 ,  H10K59/126 ,  H10K71/00 ,  H10K59/12 ,  H10K59/123

Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.

公开(公告)号：US11942488B2

公开(公告)日：2024-03-26

申请号：US18193200

申请日：2023-03-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kyung Jin Jeon ,  So Young Koo ,  Eok Su Kim ,  Hyung Jun Kim ,  Joon Seok Park ,  Jun Hyung Lim

IPC: H01L27/14 ,  H01L27/12 ,  H10K59/131

CPC classification number: H01L27/124 ,  H01L27/1262 ,  H10K59/131

Abstract: A display device includes: a substrate; a first conductive layer on the substrate and comprising a first signal line; an insulating layer pattern on the first conductive layer; a semiconductor pattern on the insulating layer pattern; a gate insulating layer on the semiconductor pattern; and a second conductive layer comprising a gate electrode on the gate insulting layer and a first source/drain electrode and a second source/drain electrode, each on at least a part of the semiconductor pattern, wherein the insulating layer pattern and the semiconductor pattern have a same planar shape, the semiconductor pattern comprises a channel region overlapping the gate electrode, a first source/drain region on a first side of the channel region and a second source/drain region on a second side of the channel region, and the first source/drain electrode electrically connects the first source/drain region and the first signal line.