公开(公告)号：US09263105B2

公开(公告)日：2016-02-16

申请号：US14143154

申请日：2013-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngjin Jeon ,  Jeongdon Ihm ,  Kilsoo Kim ,  Jinman Han

IPC: G11C7/10 ,  G11C7/22 ,  G11C7/04

CPC classification number: G06F3/0604 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G11C7/04 ,  G11C7/1084 ,  G11C7/1093 ,  G11C7/1096 ,  G11C7/222 ,  H01L2224/48227 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Memory systems are provided. A memory system may include a plurality of nonvolatile memories and a memory controller configured to control the plurality of nonvolatile memories. Moreover, the memory system may include an input/output buffer circuit connected between the memory controller and the plurality of nonvolatile memories. A data channel may be connected between the memory controller and the input/output buffer circuit, and first and second internal data channels may be connected between the input/output buffer circuit and respective first and second groups of the plurality of nonvolatile memories. The input/output buffer circuit may be configured to connect the data channel to one of the first and second internal data channels.

Abstract translation: 提供内存系统。 存储器系统可以包括多个非易失性存储器和被配置为控制多个非易失性存储器的存储器控​​制器。 此外，存储器系统可以包括连接在存储器控制器和多个非易失性存储器之间的输入/输出缓冲器电路。 数据通道可以连接在存储器控制器和输入/输出缓冲器电路之间，并且第一和第二内部数据通道可以连接在输入/输出缓冲器电路和多个非易失性存储器的相应的第一和第二组之间。 输入/输出缓冲器电路可以被配置为将数据信道连接到第一和第二内部数据信道之一。

公开(公告)号：US08964468B2

公开(公告)日：2015-02-24

申请号：US14319137

申请日：2014-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangyong Yoon ,  Kitae Park ,  Jinman Han ,  Wonseok Lee

IPC: G11C16/04 ,  G11C16/10 ,  G11C14/00

CPC classification number: G11C16/10 ,  G11C11/56 ,  G11C11/5628 ,  G11C14/0018 ,  G11C16/0483 ,  G11C16/26 ,  G11C2211/5641 ,  G11C2211/5642 ,  G11C2211/5643

Abstract: A data storage device includes a non-volatile memory device which includes a memory cell array; and a memory controller which includes a buffer memory. The operating method of the data storage device includes storing data in the buffer memory, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of the memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to the multi-bit memory device based on the program pattern.

Abstract translation: 数据存储装置包括：非易失性存储装置，其包括存储单元阵列; 以及包括缓冲存储器的存储器控​​制器。 数据存储装置的操作方法包括将数据存储在缓冲存储器中，并且确定存储在缓冲存储器中的数据是否是伴随存储器单元阵列的缓冲器程序操作的数据。 当存储在缓冲存储器中的数据是伴随缓冲器程序操作的数据时，该方法还包括确定是否需要对存储单元阵列的主程序操作，以及当需要存储单元阵列的主程序操作时， 存储单元阵列中的主程序操作的程序模式。 该方法还包括基于该程序模式向存储单元阵列发出用于主程序操作的一组命令到多位存储器件。