SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

    公开(公告)号:US20240162130A1

    公开(公告)日:2024-05-16

    申请号:US18223757

    申请日:2023-07-19

    CPC classification number: H01L23/49816 H01L21/4853 H01L21/486 H01L23/49827

    Abstract: A semiconductor package includes a first redistribution wiring layer having first and second surfaces opposite to each other, the first redistribution wiring layer including a plurality of first redistribution wires and a plurality of landing pads electrically connected to the first redistribution wires, the plurality of landing pads exposed from the second surface, a second redistribution wiring layer disposed on the first surface of the first redistribution wiring layer, the second redistribution wiring layer including an insulating layer, a logic semiconductor chip provided in the insulating layer, second redistribution wires electrically connected to the logic semiconductor chip, and third redistribution wires electrically connected to the first redistribution wires, the third redistribution wires extending to penetrate the insulating layer, a third redistribution wiring layer disposed on the second redistribution wiring layer, the third redistribution wiring layer including fourth redistribution wires electrically connected to the third redistribution wires, and a semiconductor substrate disposed on an upper surface of the third redistribution wire layer, the semiconductor substrate including at least one memory semiconductor chip electrically connected to the fourth redistribution wires.

    Rack assembly and dish washer comprising the same

    公开(公告)号:US11969130B2

    公开(公告)日:2024-04-30

    申请号:US17548362

    申请日:2021-12-10

    CPC classification number: A47L15/502 A47L15/507

    Abstract: A rack assembly of a dish washer is disclosed. A rack assembly of a dish washer according to an embodiment of the disclosure includes a frame including a plurality of wires separately arranged on a bottom surface configured to house cutlery, and a plurality of tine blocks detachable from the plurality of wires, each of the plurality of tine blocks respectively includes a holding surface supporting the cutlery, and a plurality of tines formed on the holding surface, wherein the plurality of tine blocks include a first time block including a plurality of first tines separately arranged by a first interval in a first direction, and a second tine block including a plurality of tines separately arranged by a second interval narrower than the first interval in the first direction.

    Nonvolatile memory device having selectable sensing modes, memory system having the same and programming method thereof
    9.
    发明授权
    Nonvolatile memory device having selectable sensing modes, memory system having the same and programming method thereof 有权
    具有可选感测模式的非易失性存储器件,具有相同的存储器系统及其编程方法

    公开(公告)号:US09349466B2

    公开(公告)日:2016-05-24

    申请号:US14177457

    申请日:2014-02-11

    CPC classification number: G11C16/26 G11C11/5628 G11C16/0483 G11C16/06

    Abstract: A non-volatile memory device includes a sensing mode selector configured to select a sensing mode according to environment information. A page buffer senses a data state of a memory cell in one of a plurality of sensing methods, depending upon the selected sensing mode. Memory device operations include high speed program operations, high speed verify operations, high reliability accurate program operations, and high reliability accurate verify operations.

    Abstract translation: 一种非易失性存储器件包括:感测模式选择器,被配置为根据环境信息选择感测模式。 取决于所选择的感测模式,页面缓冲器以多种感测方法中的一种感测存储器单元的数据状态。 存储器件操作包括高速程序操作,高速验证操作,高可靠性精确的程序操作和高可靠性的精确验证操作。

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