公开(公告)号：US20190214478A1

公开(公告)日：2019-07-11

申请号：US16050652

申请日：2018-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju Youn Kim ,  Se Ki Hong

IPC: H01L29/66 ,  H01L27/108 ,  H01L29/49 ,  H01L21/28

CPC classification number: H01L29/66484 ,  H01L21/28079 ,  H01L27/10894 ,  H01L29/4958 ,  H01L29/6656

Abstract: A semiconductor device includes a substrate with first and second areas, a first trench in the first area, and first and second PMOS transistors in the first area and the second area, respectively. The first transistor includes a first gate insulating layer, a first TiN layer on and contacting the first gate insulating layer, and a first gate electrode on and contacting the first TiN layer. The second transistor includes a second gate insulating layer, a second TiN layer on and contacting the second gate insulating layer, and a first TiAlC layer on and contacting the second TiN layer. The first gate insulating layer, the first TiN layer, and the first gate electrode are within the first trench. The first gate electrode does not include aluminum. A threshold voltage of the first transistor is smaller than a threshold voltage of the second transistor.

公开(公告)号：US11664437B2

公开(公告)日：2023-05-30

申请号：US17208186

申请日：2021-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju Youn Kim ,  Se Ki Hong

IPC: H01L27/092 ,  H01L29/49 ,  H01L29/66 ,  H01L21/28

CPC classification number: H01L29/66484 ,  H01L21/28079 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/6656 ,  H10B10/12 ,  H10B10/18 ,  H10B12/09

Abstract: A semiconductor device includes a substrate with first and second areas, a first trench in the first area, and first and second PMOS transistors in the first area and the second area, respectively. The first transistor includes a first gate insulating layer, a first TiN layer on and contacting the first gate insulating layer, and a first gate electrode on and contacting the first TiN layer. The second transistor includes a second gate insulating layer, a second TiN layer on and contacting the second gate insulating layer, and a first TiAlC layer on and contacting the second TiN layer. The first gate insulating layer, the first TiN layer, and the first gate electrode are within the first trench. The first gate electrode does not include aluminum. A threshold voltage of the first transistor is smaller than a threshold voltage of the second transistor.

公开(公告)号：US11101269B2

公开(公告)日：2021-08-24

申请号：US17025497

申请日：2020-09-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min Yoo ,  Ju Youn Kim ,  Hyung Joo Na ,  Bong Seok Suh ,  Joo Ho Jung ,  Eui Chui Hwang ,  Sung Moon Lee

IPC: H01L27/088 ,  H01L29/40 ,  H01L21/762 ,  H01L29/78

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US10861853B2

公开(公告)日：2020-12-08

申请号：US16244324

申请日：2019-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Se Ki Hong ,  Ju Youn Kim ,  Jin Wook Kim

IPC: H01L27/092 ,  H01L21/82 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/423 ,  H01L29/78

Abstract: A semiconductor device includes a substrate having first and second regions, a first gate electrode layer on the first region, and including a first conductive layer, and a second gate electrode layer on the second region, and including the first conductive layer, a second conductive layer on the first conductive layer, and a barrier metal layer on the second conductive layer, wherein an upper surface of the first gate electrode layer is at a lower level than an upper surface of the second gate electrode layer.

公开(公告)号：US10692781B2

公开(公告)日：2020-06-23

申请号：US15928858

申请日：2018-03-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ju Youn Kim ,  Ji Hwan An ,  Tae Won Ha ,  Se Ki Hong

IPC: H01L21/02 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/66 ,  H01L29/08 ,  H01L29/161 ,  H01L29/16 ,  H01L29/165 ,  H01L29/78 ,  H01L21/8234 ,  H01L27/088

Abstract: A semiconductor device including a first fin pattern and a second fin pattern, which are in parallel in a lengthwise direction; a first trench between the first fin pattern and the second fin pattern; a field insulating film partially filling the first trench, an upper surface of the field insulating film being lower than an upper surface of the first fin pattern and an upper surface of the second fin pattern; a spacer spaced apart from the first fin pattern and the second fin pattern, the spacer being on the field insulating film and defining a second trench, the second trench including an upper portion and an lower portion; an insulating line pattern on a sidewall of the lower portion of the second trench; and a conductive pattern filling an upper portion of the second trench and being on the insulating line pattern.

公开(公告)号：US10553693B2

公开(公告)日：2020-02-04

申请号：US15958061

申请日：2018-04-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Se Ki Hong ,  Ju Youn Kim ,  Jin-Wook Kim ,  Tae Eung Yoon ,  Tae Won Ha ,  Jung Hoon Seo ,  Seul Gi Yun

IPC: H01L29/00 ,  H01L29/423 ,  H01L27/092 ,  H01L29/06 ,  H01L29/49 ,  H01L21/28 ,  H01L21/8238 ,  H01L29/66

Abstract: A semiconductor device includes a substrate having first and second active regions with a field insulating layer therebetween that contacts the first and second active regions, and a gate electrode on the substrate and traversing the first active region, the second active region, and the field insulating layer. The gate electrode includes a first portion over the first active region, a second portion over the second active region, and a third portion in contact with the first and second portions. The gate electrode includes an upper gate electrode having first through third thicknesses in the first through third portions, respectively, where the third thickness is greater than the first thickness, and smaller than the second thickness.

公开(公告)号：US20180366329A1

公开(公告)日：2018-12-20

申请号：US15862768

申请日：2018-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju Youn Kim

IPC: H01L21/28 ,  H01L29/66 ,  H01L21/762 ,  H01L29/423 ,  H01L29/165

Abstract: A semiconductor device includes a fin-type pattern on a substrate, a first gate structure being on the fin-type pattern and including first gate spacers and a first gate insulating layer extending along sidewalls of the first gate spacers, a second gate structure being on the fin-type pattern and including second gate spacers and a second gate insulating layer extending along sidewalk of the second gate spacers, a pair of dummy spacers between the first gate structure and the second gate structure, a separation trench being between the pair of dummy spacers and having sidewalls defined by the pair of dummy spacers and the fin-type pattern, a device isolation layer in a portion of the separation trench, and a connection conductive pattern being on the device isolating layer and in the separation trench and contacting the pair of dummy spacers.

公开(公告)号：US09972544B2

公开(公告)日：2018-05-15

申请号：US15390762

申请日：2016-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ju Youn Kim ,  Ji Hwan An ,  Tae Won Ha ,  Se Ki Hong

IPC: H01L21/82 ,  H01L29/06 ,  H01L27/088 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/08 ,  H01L29/161 ,  H01L29/16 ,  H01L29/165 ,  H01L29/78 ,  H01L21/8234

CPC classification number: H01L21/823878 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/7848

Abstract: A semiconductor device including a first fin pattern and a second fin pattern, which are in parallel in a lengthwise direction; a first trench between the first fin pattern and the second fin pattern; a field insulating film partially filling the first trench, an upper surface of the field insulating film being lower than an upper surface of the first fin pattern and an upper surface of the second fin pattern; a spacer spaced apart from the first fin pattern and the second fin pattern, the spacer being on the field insulating film and defining a second trench, the second trench including an upper portion and an lower portion; an insulating line pattern on a sidewall of the lower portion of the second trench; and a conductive pattern filling an upper portion of the second trench and being on the insulating line pattern.

公开(公告)号：US09076669B2

公开(公告)日：2015-07-07

申请号：US13833153

申请日：2013-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju Youn Kim ,  Young-Hun Kim

IPC: H01L21/70 ,  H01L27/088 ,  H01L21/02 ,  H01L27/11 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/28 ,  H01L29/51 ,  H01L29/78

CPC classification number: H01L29/517 ,  H01L21/02 ,  H01L21/28088 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/823857 ,  H01L27/088 ,  H01L27/092 ,  H01L27/1104 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/78

Abstract: A semiconductor device having high-k gate insulation films and a method of fabricating the semiconductor device are provided. The semiconductor device includes a first gate insulation film on a substrate and the first gate insulation film includes a material selected from the group consisting of HfO2, ZrO2, Ta2O5, TiO2, SrTiO3 and (Ba,Sr)TiO3, and lanthanum (La). Additionally, the semiconductor device includes a first barrier film on the first gate insulation film, a first gate electrode on the first barrier film, and n-type source/drain regions in the substrate at both sides of the first gate electrode.

Abstract translation: 提供了具有高k栅极绝缘膜的半导体器件和制造半导体器件的方法。 半导体器件包括在衬底上的第一栅极绝缘膜，第一栅极绝缘膜包括选自HfO 2，ZrO 2，Ta 2 O 5，TiO 2，SrTiO 3和（Ba，Sr）TiO 3和镧（La）的材料。 此外，半导体器件包括第一栅极绝缘膜上的第一阻挡膜，第一阻挡膜上的第一栅极电极和第一栅电极两侧的基板中的n型源极/漏极区域。

公开(公告)号：US11784186B2

公开(公告)日：2023-10-10

申请号：US17393025

申请日：2021-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min Yoo ,  Ju Youn Kim ,  Hyung Joo Na ,  Bong Seok Suh ,  Joo Ho Jung ,  Eui Chui Hwang ,  Sung Moon Lee

IPC: H01L27/088 ,  H01L29/40 ,  H01L21/762 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L21/76224 ,  H01L29/408 ,  H01L29/7846

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.