公开(公告)号：US20210217848A1

公开(公告)日：2021-07-15

申请号：US16943103

申请日：2020-07-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangsu Kim ,  Junbeom Park ,  Junggil Yang

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/423 ,  H01L29/06 ,  H01L29/66

Abstract: A semiconductor device including an active pattern on a substrate and extending lengthwise in a first direction parallel to an upper surface of the substrate; a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction; channels spaced apart from each other along a third direction perpendicular to the upper surface of the substrate, each of the channels extending through the gate structure along the first direction; a source/drain layer on a portion of the active pattern adjacent to the gate structure in the first direction, the source/drain layer contacting the channels; inner spacers between the gate structure and the source/drain layer, the inner spacers contacting the source/drain layer; and channel connection portions between each of the inner spacers and the gate structure, the channel connection portions connecting the channels with each other.

公开(公告)号：US11038018B2

公开(公告)日：2021-06-15

申请号：US16775513

申请日：2020-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soojin Jeong ,  Sunwook Kim ,  Junbeom Park ,  Seungmin Song

IPC: H01L29/08 ,  H01L27/088 ,  H01L29/16 ,  H01L29/78

Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction parallel to an upper surface of the substrate, a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction, channels spaced apart from each other in a third direction perpendicular to the upper surface of the substrate, each of the channels extending through the gate structure, a source/drain layer on a portion of the active pattern adjacent the gate structure, the source/drain layer contacting the channels, and a sacrificial pattern on an upper surface of each of opposite edges of the portion of the active pattern in the second direction, the sacrificial pattern contacting a lower portion of a sidewall of the source/drain layer and including silicon-germanium.

公开(公告)号：US12051754B2

公开(公告)日：2024-07-30

申请号：US17862909

申请日：2022-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sujin Jung ,  Junbeom Park ,  Kihwan Kim ,  Sunguk Jang ,  Youngdae Cho

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/02645 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/78618

Abstract: A semiconductor device, including a silicon on insulator (SOI) substrate is disclosed. The device may include gate structures formed on the SOI substrate and being spaced apart from each other in a horizontal direction, and a plurality of channels spaced apart from each other in a vertical direction. Each of the channels may extend through each of the gate structures in the horizontal direction. The device may include a seed layer and a source/drain region. The source/drain region may be connected to the channels, and each sidewall of the source/drain region in the horizontal direction may have a concave-convex shape. The device may include a protruding portion of the source/drain region formed between the gate structures that protrudes in the horizontal direction compared to a non-protruding portion of the source/drain region formed between the channels.

公开(公告)号：US11961914B2

公开(公告)日：2024-04-16

申请号：US18321962

申请日：2023-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungmin Song ,  Junbeom Park ,  Bongseok Suh ,  Junggil Yang

IPC: H01L29/78 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795

Abstract: Integrated circuit devices including a fin shaped active region and methods of forming the same are provided. The devices may include a fin shaped active region, a plurality of semiconductor patterns on the fin shaped active region, a gate electrode on the plurality of semiconductor patterns, and source/drain regions on opposing sides of the gate electrode, respectively. The gate electrode may include a main gate portion extending on an uppermost semiconductor pattern and a sub-gate portion extending between two adjacent ones of the plurality of semiconductor patterns. The sub-gate portion may include a sub-gate center portion and sub-gate edge portions. In a horizontal cross-sectional view, a first width of the sub-gate center portion in a first direction may be less than a second width of one of the sub-gate edge portions in the first direction.

公开(公告)号：US11881509B2

公开(公告)日：2024-01-23

申请号：US17396942

申请日：2021-08-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junbeom Park ,  Sangmo Koo ,  Minyi Kim ,  Seokhyeon Yoon

IPC: H01L29/08 ,  H01L29/66 ,  H01L29/10

CPC classification number: H01L29/0847 ,  H01L29/1033 ,  H01L29/66553

Abstract: The semiconductor device may include an active pattern provided on a substrate and a source/drain pattern on the active pattern. The source/drain pattern may include a bottom surface in contact with a top surface of the active pattern. The semiconductor device may further include a channel pattern connected to the source/drain pattern, a gate electrode extended to cross the channel pattern, and a fence insulating layer extended from a side surface of the active pattern to a lower side surface of the source/drain pattern. A pair of middle insulating patterns may be at both sides of the bottom surface of the source/drain pattern and between the active pattern and the source/drain pattern in contact with an inner side surface of the fence insulating layer.

公开(公告)号：US11695041B2

公开(公告)日：2023-07-04

申请号：US17577595

申请日：2022-01-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangsu Kim ,  Junbeom Park ,  Junggil Yang

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/1029 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/78654

Abstract: A semiconductor device including an active pattern on a substrate and extending lengthwise in a first direction parallel to an upper surface of the substrate; a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction; channels spaced apart from each other along a third direction perpendicular to the upper surface of the substrate, each of the channels extending through the gate structure along the first direction; a source/drain layer on a portion of the active pattern adjacent to the gate structure in the first direction, the source/drain layer contacting the channels; inner spacers between the gate structure and the source/drain layer, the inner spacers contacting the source/drain layer; and channel connection portions between each of the inner spacers and the gate structure, the channel connection portions connecting the channels with each other.

公开(公告)号：US20220352388A1

公开(公告)日：2022-11-03

申请号：US17862909

申请日：2022-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： SUJIN JUNG ,  Junbeom Park ,  Kihwan Kim ,  Sunguk Jang ,  Youngdae Cho

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L21/02

Abstract: A semiconductor device, including a silicon on insulator (SOI) substrate is disclosed. The device may include gate structures formed on the SOI substrate and being spaced apart from each other in a horizontal direction, and a plurality of channels spaced apart from each other in a vertical direction. Each of the channels may extend through each of the gate structures in the horizontal direction. The device may include a seed layer and a source/drain region. The source/drain region may be connected to the channels, and each sidewall of the source/drain region in the horizontal direction may have a concave-convex shape. The device may include a protruding portion of the source/drain region formed between the gate structures that protrudes in the horizontal direction compared to a non-protruding portion of the source/drain region formed between the channels.

公开(公告)号：US11233122B2

公开(公告)日：2022-01-25

申请号：US16943103

申请日：2020-07-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangsu Kim ,  Junbeom Park ,  Junggil Yang

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423

Abstract: A semiconductor device including an active pattern on a substrate and extending lengthwise in a first direction parallel to an upper surface of the substrate; a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction; channels spaced apart from each other along a third direction perpendicular to the upper surface of the substrate, each of the channels extending through the gate structure along the first direction; a source/drain layer on a portion of the active pattern adjacent to the gate structure in the first direction, the source/drain layer contacting the channels; inner spacers between the gate structure and the source/drain layer, the inner spacers contacting the source/drain layer; and channel connection portions between each of the inner spacers and the gate structure, the channel connection portions connecting the channels with each other.