公开(公告)号：US12040391B2

公开(公告)日：2024-07-16

申请号：US17398407

申请日：2021-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joonyong Kim ,  Sunkyu Hwang ,  Jongseob Kim ,  Junhyuk Park

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/40 ,  H01L29/778

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/407 ,  H01L29/66462

Abstract: Provided are a power device and a method of manufacturing the same. The power device may include a channel layer; a source and a drain at respective sides of the channel layer; a gate on the channel layer between the source and the drain; a passivation layer covering the source, the drain, and the gate; and a plurality of field plates in the passivation layer. The plurality of field plates may have different thicknesses. The plurality of field plates may have different widths, different pattern shapes, or both different widths and different pattern shapes.

公开(公告)号：US12002879B2

公开(公告)日：2024-06-04

申请号：US17098896

申请日：2020-11-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunkyu Hwang ,  Joonyong Kim ,  Jongseob Kim ,  Junhyuk Park ,  Boram Kim ,  Younghwan Park ,  Dongchul Shin ,  Jaejoon Oh ,  Soogine Chong ,  Injun Hwang

IPC: H01L29/778 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/66462 ,  H01L29/7787

Abstract: Provided is a high electron mobility transistor including: a channel layer comprising a 2-dimensional electron gas (2DEG); a barrier layer on the channel layer and comprising first regions and a second region, the first regions configured to induce the 2DEG of a first density in portions of the channel layer and the second region configured to induce the 2DEG of a second density different from the first density in other portions of the channel layer; source and drain electrodes on the barrier layer; a depletion formation layer formed on the barrier layer between the source and drain electrodes to form a depletion region in the 2DEG; and a gate electrode on the barrier layer. The first regions may include a first edge region and a second edge region corresponding to both ends of a surface of the gate electrode facing the channel layer.

公开(公告)号：US11837642B2

公开(公告)日：2023-12-05

申请号：US17016877

申请日：2020-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soogine Chong ,  Jongseob Kim ,  Joonyong Kim ,  Younghwan Park ,  Junhyuk Park ,  Dongchul Shin ,  Jaejoon Oh ,  Sunkyu Hwang ,  Injun Hwang

IPC: H01L29/423 ,  H01L21/02 ,  H01L21/285 ,  H01L21/765 ,  H01L23/31 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/42316 ,  H01L21/022 ,  H01L21/0217 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/28587 ,  H01L21/765 ,  H01L23/3171 ,  H01L23/3192 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/404 ,  H01L29/66462 ,  H01L29/7786

Abstract: A semiconductor device includes a channel layer including a channel; a channel supply layer on the channel layer; a channel separation pattern on the channel supply layer; a gate electrode pattern on the channel separation pattern; and an electric-field relaxation pattern protruding from a first lateral surface of the gate electrode pattern in a first direction parallel with an upper surface of the channel layer. An interface between the channel layer and the channel supply layer is adjacent to channel. A size of the gate electrode pattern in the first direction is different from a size of the channel separation pattern in the first direction. The gate electrode pattern and the electric-field relaxation pattern form a single structure.

公开(公告)号：US12199174B2

公开(公告)日：2025-01-14

申请号：US17537989

申请日：2021-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junhyuk Park ,  Sunkyu Hwang ,  Jongseob Kim ,  Joonyong Kim ,  Woochul Jeon

IPC: H01L29/778 ,  H01L21/02 ,  H01L23/29 ,  H01L23/31 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66

Abstract: The present disclosure provides a high electron mobility transistor including a channel layer; a barrier layer on the channel layer and configured to induce formation of a 2-dimensional electron gas (2DEG) to the channel layer; a p-type semiconductor layer on the barrier layer; a first passivation layer on the barrier layer and including a quaternary material of Al, Ga, O, and N; a gate electrode on the p-type semiconductor layer; and a source electrode and a drain electrode provided on both sides of the barrier layer and separated from the gate electrode.

公开(公告)号：US20240276109A1

公开(公告)日：2024-08-15

申请号：US18436743

申请日：2024-02-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Keunjoo PARK ,  Junseok Kim ,  Junhyuk Park ,  Bongki Son

IPC: H04N25/47 ,  H04N25/69 ,  H04N25/78

CPC classification number: H04N25/47 ,  H04N25/69 ,  H04N25/78

Abstract: A vision sensor is provided. The vision sensor includes: a pixel array including a plurality of pixels, each of the plurality of pixels being configured to generate an event signal based on an event in which intensity of incident light changes; and an event detection circuit including a state register including a first flip-flop and a second flip-flop. The event detection circuit is configured to: based on the event signal, store first data in the first flip-flop, the first data indicating whether flicker has occurred in each of the plurality of pixels, store second data in the second flip-flop, the second data indicating whether the event has occurred in each of the plurality of pixels, and based on a comparison of the first data and the second data, identify and delete a portion of the second data in which the flicker has occurred.

公开(公告)号：US20240107188A1

公开(公告)日：2024-03-28

申请号：US18218902

申请日：2023-07-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junseok Kim ,  Raeyoung Kim ,  Keunjoo Park ,  Jaeha Park ,  Junhyuk Park ,  Jiwon Im

IPC: H04N25/47 ,  H04N25/77

CPC classification number: H04N25/47 ,  H04N25/77

Abstract: A pixel of a vision sensor includes a photoelectric converter configured to convert an optical signal into a current, a current-to-voltage converter configured to convert the current into a first voltage, an amplifier configured to generate an output voltage by amplifying a voltage level of the first voltage, at least one comparator configured to identify whether an event occurs based on comparing the output voltage with at least one threshold voltage, and generate an event signal based on identifying that the event occurs, and at least one counter configured to receive the event signal from the at least one comparator, obtain a count value by counting the event signal as information about an amount of change in illumination, and transmit output data comprising the count value.

公开(公告)号：US11728419B2

公开(公告)日：2023-08-15

申请号：US17082478

申请日：2020-10-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Injun Hwang ,  Jaejoon Oh ,  Soogine Chong ,  Jongseob Kim ,  Joonyong Kim ,  Junhyuk Park ,  Sunkyu Hwang

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/40 ,  H01L29/20

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66462

Abstract: A high electron mobility transistor (HEMT) includes a channel layer comprising a group III-V compound semiconductor; a barrier layer comprising the group III-V compound semiconductor on the channel layer; a gate electrode on the barrier layer; a source electrode over gate electrode; a drain electrode spaced apart from the source electrode; and a metal wiring layer. A same layer of the metal wiring layer includes a gate wiring connected to the gate electrode, a source field plate connected to the source electrode, and a drain field plate connected to the drain electrode.

公开(公告)号：US11581269B2

公开(公告)日：2023-02-14

申请号：US16868745

申请日：2020-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younghwan Park ,  Jongseob Kim ,  Joonyong Kim ,  Junhyuk Park ,  Dongchul Shin ,  Jaejoon Oh ,  Soogine Chong ,  Sunkyu Hwang ,  Injun Hwang

IPC: H01L23/00 ,  H01L29/15 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778

Abstract: A semiconductor thin film structure may include a substrate, a buffer layer on the substrate, and a semiconductor layer on the buffer layer, such that the buffer layer is between the semiconductor layer and the substrate. The buffer layer may include a plurality of unit layers. Each unit layer of the plurality of unit layers may include a first layer having first bandgap energy and a first thickness, a second layer having second bandgap energy and a second thickness, and a third layer having third bandgap energy and a third thickness. One layer having a lowest bandgap energy of the first, second, and third layers of the unit layer may be between another two layers of the first, second, and third layers of the unit layer.