Gas sensor, sensor array module and mobile device including the same

    公开(公告)号:US11821871B2

    公开(公告)日:2023-11-21

    申请号:US17141456

    申请日:2021-01-05

    CPC classification number: G01N29/022 G01N29/2437 G01N2291/021

    Abstract: A gas sensor includes a piezoelectric substrate; a resonator in an electrode region on an upper surface of the piezoelectric substrate, the resonator including interdigital transducer (IDT) electrodes and IDT pads connected to the IDT electrodes, the IDT electrodes configured to generate a surface acoustic wave in a center region of the electrode region, the surface acoustic wave propagating in a first horizontal direction; a sensing film in the center region of the electrode region on the upper surface of the piezoelectric substrate, the sensing film including a sensing material that interacts with a target gas; and a heater in an edge region surrounding the electrode region on the upper surface of the piezoelectric substrate, the heater including heater electrodes configured to heat the sensing film and heater pads connected to the heater electrodes, the heater electrodes and the heater pads forming a closed conduction loop.

    Semiconductor device and method of forming the same

    公开(公告)号:US11672130B2

    公开(公告)日:2023-06-06

    申请号:US17032571

    申请日:2020-09-25

    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device including a first conductive line on a substrate, memory cell structures stacked on the first conductive line, a second conductive line between the memory cell structures; and a third conductive line on the memory cell structures may be provided. Each of the plurality of memory cell structures includes a data storage material pattern, a switching material pattern, and a plurality of electrode patterns, at least one of the electrode patterns includes at least one of carbon material layer or a carbon-containing material layer, and the at least one of the electrode patterns includes a first region doped with a nitrogen and a second region that is not doped with the nitrogen, or is doped with the nitrogen at a first concentration lower than a second concentration of the nitrogen in the first region.

    Memory devices
    13.
    发明授权

    公开(公告)号:US11444127B2

    公开(公告)日:2022-09-13

    申请号:US17019649

    申请日:2020-09-14

    Abstract: A memory device including a first conductive line on a substrate and extending in a first horizontal direction; a second conductive line on the first conductive line and extending in a second horizontal direction that is perpendicular to the first horizontal direction; and a memory cell between the first conductive line and the second conductive line, the memory cell including a variable resistance memory layer, a buffer resistance layer, and a switch material pattern, extending in a vertical direction that is perpendicular to the first horizontal direction and the second horizontal direction, and having a tapered shape with a decreasing horizontal width along the vertical direction, wherein at least a part of the variable resistance memory layer and at least a part of the buffer resistance layer of the memory cell are at a same vertical level.

    Variable resistance memory device and method of fabricating the same

    公开(公告)号:US11094745B2

    公开(公告)日:2021-08-17

    申请号:US16396650

    申请日:2019-04-27

    Abstract: A variable resistanvce memory device may include a plurality of first conductive lines extending in a first direction, a plurality of second conductive lines extending in a second direction, a plurality of memory cells, each memory cell at a respective intersection, with respect to a top down view, between a corresponding one of the first conductive lines and a corresponding one of the second conductive lines, each memory cell comprising a variable resistance structure and a switching element sandwiched between a top electrode and a bottom electrode, and a first dielectric layer filling a space between the switching elements of the memory cells. A top surface of the first dielectric layer is disposed between bottom and top surfaces of the top electrodes of the memory cells.

    Method of fabricating semiconductor devices using a two-step gap-fill process

    公开(公告)号:US11063218B2

    公开(公告)日:2021-07-13

    申请号:US16746258

    申请日:2020-01-17

    Abstract: A method of fabricating a memory device includes forming word lines and cell stacks with gaps between the cell stacks, forming a lower gap-fill insulator in the gaps, forming an upper gap-fill insulator on the lower gap-fill insulator, curing the lower gap-fill insulator and the upper gap-fill insulator to form a gap-fill insulator, and forming bit lines on the cell stacks and the gap-fill insulator. The lower gap-fill process may be performed using a first source gas that includes first and second precursors, and the upper gap-fill process may be performed using a second source gas that includes the first and second precursors, a volume ratio of the first precursor to the second precursor in the first source gas may be greater than 15:1, and a volume ratio of the first precursor to the second precursor in the second source gas may be less than 15:1.

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