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11.发明授权公开(公告)号：US11777510B2
公开(公告)日：2023-10-03
申请号：US17964377
申请日：2022-10-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Baekmin Lim , Seungjin Kim , Seunghyun Oh
CPC classification number: H03L7/1976 , H03L7/081 , H03L7/093
Abstract: A fractional divider processing circuitry is to receive one of a plurality of clock signals as an input clock signal, and generate a first division clock signal based on the input clock signal and a first control signal. Phases of the plurality of clock signals partially overlap each other. The processing circuitry generates a delta-sigma modulation signal based on the first division clock signal and a frequency control word, and generates a second division clock signal based on the plurality of clock signals, the first division clock signal and a second control signal. The second control signal corresponds to a quantization noise of the delta-sigma modulation signal. The processing circuitry generates the second control signal and a digital control word based on the quantization noise of the delta-sigma modulator. The processing circuitry generates a final division clock signal based on the second division clock signal and the digital control word.
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公开(公告)号：US11509298B2
公开(公告)日：2022-11-22
申请号：US17514552
申请日：2021-10-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehoon Lee , Yong Lim , Wan Kim , Barosaim Sung , Seunghyun Oh
Abstract: A comparator configured to calibrate an offset according to a control signal, including an input circuit configured to receive a first input signal and a second input signal, and to generate a first internal signal corresponding to the first input signal and a second internal signal corresponding to the second input signal; a differential amplification circuit configured to consume a supply current flowing from a positive voltage node having a positive supply voltage to a negative voltage node having a negative supply voltage, and to generate an output signal by amplifying a difference between the first internal signal and the second internal signal; and a current valve configured to adjust at least a portion of the supply current based on the control signal.
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公开(公告)号：US11012070B2
公开(公告)日：2021-05-18
申请号：US16599831
申请日：2019-10-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongil Yang , Wonsub Lim , Daeyoung Kim , Sunah Park , Seunghyun Oh
IPC: H03K17/96 , H04B1/04 , G06F1/16 , H04B1/3827 , H04M1/72454 , H04W12/06 , H04W4/80 , H01Q1/24 , H04B5/00 , H04W52/02 , G01R1/02 , H04B1/00
Abstract: An electronic device and a method of grip recognition of the electronic device are provided. The electronic device includes an antenna; a radio communication unit having a coupler; a memory; and a processor which is operatively connected to the radio communication unit and the memory. The memory comprises instructions, executable by the processor. The processor is configured to detect a first signal being transmitted and a second signal being received through the antenna using the coupler, calculate a reflection coefficient of the antenna based on the first signal and the second signal, determine at least one of a signal magnitude or a phase corresponding to the reflection coefficient, and determine whether the electronic device is being gripped based on the at least one of the signal magnitude or the phase.
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公开(公告)号：US10921847B2
公开(公告)日：2021-02-16
申请号：US16724754
申请日：2019-12-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangdon Jung , Jaehong Jung , Seunghyun Oh , Kyungmin Lee
Abstract: The clock generator is provided and includes a phase detector, a voltage generator, a voltage-to-current converter, and an oscillation circuit. The voltage generator generates a control voltage. The voltage-to-current converter converts the control voltage into an internal current having a level based on a resistance value of a resistor circuit, the resistance value set based on first control information. The oscillation circuit generates a output clock having a frequency based on the level of the internal current and a capacitance value of a capacitor circuit, the capacitance value set based on second control information. The clock generator maintains a frequency value and varies jitter characteristics of the output clock in response to the first control information and the second control information.
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公开(公告)号：US20200044653A1
公开(公告)日：2020-02-06
申请号：US16599831
申请日：2019-10-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongil YANG , Wonsub Lim , Daeyoung Kim , Sunah Park , Seunghyun Oh
IPC: H03K17/96 , G06F1/16 , H04B1/3827 , H04B1/04 , H04W52/02 , H04M1/725 , H04B5/00 , H01Q1/24 , H04W4/80
Abstract: An electronic device and a method of grip recognition of the electronic device are provided. The electronic device includes an antenna; a radio communication unit having a coupler; a memory; and a processor which is operatively connected to the radio communication unit and the memory. The memory comprises instructions, executable by the processor. The processor is configured to detect a first signal being transmitted and a second signal being received through the antenna using the coupler, calculate a reflection coefficient of the antenna based on the first signal and the second signal, determine at least one of a signal magnitude or a phase corresponding to the reflection coefficient, and determine whether the electronic device is being gripped based on the at least one of the signal magnitude or the phase.
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Patent Agency Ranking
公开(公告)号：US11876487B2
公开(公告)日：2024-01-16
申请号：US18152418
申请日：2023-01-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jaehong Jung , Seungjin Kim , Seunghyun Oh
CPC classification number: H03B5/36 , H03L7/099 , H03B2200/009
Abstract: An oscillator includes a crystal oscillation circuit configured to generate an oscillation signal having a natural frequency, an injection circuit configured to inject a first injection signal and a second injection signal into the crystal oscillation circuit, a dithering circuit configured to transmit a first control signal for generating the first injection signal to the injection circuit, and a phased-lock loop (PLL) circuit configured to lock a phase of the first injection signal to the natural frequency, to transmit a second control signal for generating the second injection signal to the injection circuit.
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公开(公告)号：US11804848B2
公开(公告)日：2023-10-31
申请号：US17705776
申请日：2022-03-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jaehoon Lee , Yong Lim , Seunghyun Oh
CPC classification number: H03M1/466 , H03K3/356104 , H03M1/1245 , H03M1/462
Abstract: An analog-to-digital converter of successive approximation register (SAR) type includes a comparator, a SAR logic circuit, and a capacitor digital-to-analog converter. The capacitor digital-to-analog converter includes a plurality of drivers. Each driver includes a capacitor and a split inverter. A first capacitor node of the capacitor is connected to one of comparison input terminals. The split inverter includes a pull-up unit connected to a first reference voltage and a pull-down unit connected to a second reference voltage. The split inverter drives a second capacitor node of the capacitor by selectively turning on one of the pull-up unit and the pull-down unit. A first one of the pull-up unit and the pull-down unit includes a full transistor, and a second one of the pull-up unit and the pull-down unit includes a first split transistor and a second split transistor. A short current is reduced using the split inverter.
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公开(公告)号：US20230291354A1
公开(公告)日：2023-09-14
申请号：US18152418
申请日：2023-01-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jaehong JUNG , Seungjin Kim , Seunghyun Oh
CPC classification number: H03B5/36 , H03L7/099 , H03B2200/009
Abstract: An oscillator includes a crystal oscillation circuit configured to generate an oscillation signal having a natural frequency, an injection circuit configured to inject a first injection signal and a second injection signal into the crystal oscillation circuit, a dithering circuit configured to transmit a first control signal for generating the first injection signal to the injection circuit, and a phased-lock loop (PLL) circuit configured to lock a phase of the first injection signal to the natural frequency, to transmit a second control signal for generating the second injection signal to the injection circuit.
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公开(公告)号：US11601131B2
公开(公告)日：2023-03-07
申请号：US17734693
申请日：2022-05-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangdon Jung , Gyusik Kim , Seungjin Kim , Seunghyun Oh , Jihwan Kim
Abstract: A phase locked loop includes a phase detector outputting a first signal corresponding to a phase difference of a reference frequency signal and a division frequency signal, a charge pump amplifying a first signal to output a second signal, a loop filter filtering the second signal to output a third signal, a voltage-to-current converter receiving the third signal and outputting a fourth signal, a digital-to-analog converter outputting a fifth signal based on the fourth signal and a digital compensation signal, an oscillator outputting an output frequency signal having a frequency corresponding to the fifth signal, a divider dividing the frequency of the output frequency signal to output the division frequency signal and a compensation frequency signal, and an automatic frequency calibrator compensating for the voltage-to-current converter based on a difference between a frequency of the compensation frequency signal and a frequency of a reference frequency signal.
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公开(公告)号：US11336308B2
公开(公告)日：2022-05-17
申请号：US16767225
申请日：2019-01-31
Applicant: Samsung Electronics Co., Ltd.
Inventor： Wonsub Lim , Seunghyun Oh , Hyoseok Na , Dongil Yang
Abstract: Disclosed is an electronic device. Other various embodiments as understood from the specification are also possible. The electronic device may include an antenna, a communication module including a transceiver, and a control circuit. The control circuit may be configured to radiate a first signal generated from the transceiver through the antenna, to obtain at least part of a second signal obtained by combining a forward signal delivered from the communication module to the antenna and a reverse signal reflected from the antenna, and to determine a reflection coefficient for the antenna based on at least part of the first signal and at least part of the second signal.
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