公开(公告)号：US06797651B2

公开(公告)日：2004-09-28

申请号：US10080424

申请日：2002-02-22

申请人： Takashi Hagino ,  Kazuhiro Imao ,  Ken Wakita ,  Toshio Monzen ,  Hidenori Ogata ,  Shiro Nakanishi ,  Yoshihiro Morimoto

发明人： Takashi Hagino ,  Kazuhiro Imao ,  Ken Wakita ,  Toshio Monzen ,  Hidenori Ogata ,  Shiro Nakanishi ,  Yoshihiro Morimoto

IPC分类号： H01L2126

CPC分类号： H01L21/02675 ,  H01L21/02532 ,  H01L21/02686 ,  H01L21/2026 ,  H01L21/268

摘要： A laser annealing apparatus is provided in which laser light is irradiated onto an amorphous semiconductor layer placed inside an annealing chamber through a chamber window, thereby poly-crystallizing the amorphous semiconductor film. Inside the annealing chamber a low degree vacuum (about 1.3×103 Pa to about 1.3 Pa) is maintained at a room temperature. An inert gas such as nitrogen, hydrogen, or argon is introduced into the atmosphere while maintaining the low degree vacuum. As a result, the surface smoothness of the polycrystalline semiconductor layer is comparable to that resulting from high degree vacuum annealing, while, unlike high degree vacuum annealing, there is less contamination of the chamber window and productivity is improved.

摘要翻译： 提供一种激光退火装置，其中激光照射到通过室窗放置在退火室内部的非晶半导体层上，从而使非晶半导体膜多晶化。 在退火室内，将低度真空度（约1.3×10 3 Pa至约1.3Pa）保持在室温。 将惰性气体如氮气，氢气或氩气引入气氛中同时保持低度真空度。 结果，多晶半导体层的表面平滑度与高度真空退火得到的表面平滑度相当，而与高度真空退火不同，室窗口的污染较少，生产率提高。

公开(公告)号：US06613618B1

公开(公告)日：2003-09-02

申请号：US09542200

申请日：2000-04-04

申请人： Shiro Nakanishi ,  Tsutomu Yamada

发明人： Shiro Nakanishi ,  Tsutomu Yamada

IPC分类号： H01L2184

CPC分类号： H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678

摘要： A thin-film transistor is provided in which the thickness of the insulating film is optimized. A gate electrode is formed on a transparent substrate. A silicon nitride film and a silicon oxide film, acting as a gate insulating film, are formed over the transparent substrate. A polycrystalline silicon film, being a semiconductor film, is formed acting as an active region. A stopper is formed on the polycrystalline silicon film corresponding to the gate electrode. A silicon oxide film and a silicon nitride film, acting as an interlayer insulating film, are deposited as to cover the stopper region. The total film thickness T1 of the stopper and the silicon oxide film is formed to be thinner than (the thickness T2 of the silicon nitride film×8000 Å)½. This structure allows hydrogen atoms to be sufficiently supplied from the silicon nitride film into the polycrystalline silicon film via the stopper and the silicon oxide film, so that crystalline defects in the polycrystalline silicon film can be filled with the hydrogen atoms.

摘要翻译： 提供了薄膜晶体管，其中绝缘膜的厚度被优化。 在透明基板上形成栅电极。 在透明基板上形成用作栅极绝缘膜的氮化硅膜和氧化硅膜。 作为半导体膜的多晶硅膜被形成为起主动区域的作用。 在与栅电极相对应的多晶硅膜上形成止动件。 作为层间绝缘膜的氧化硅膜和氮化硅膜被沉积以覆盖阻挡区域。 阻挡层和氧化硅膜的总膜厚T1形成为比（氮化硅膜的厚度T2）薄。 这种结构使得氢原子能够通过阻挡层和氧化硅膜从氮化硅膜充分供给到多晶硅膜中，从而可以用氢原子填充多晶硅膜中的晶体缺陷。

公开(公告)号：US06548828B2

公开(公告)日：2003-04-15

申请号：US09162208

申请日：1998-09-28

申请人： Shiro Nakanishi ,  Kiyoshi Yoneda

发明人： Shiro Nakanishi ,  Kiyoshi Yoneda

IPC分类号： H01L2900

CPC分类号： H01L29/66765 ,  H01L29/42384 ,  H01L29/4908

摘要： On a substrate, there is disposed a gate electrode having a section of a trapezoidal configuration expanded toward the substrate. The gate electrode is covered with a silicon nitride film having a thickness T1 of 400 Å, and a silicon oxide film having a thickness T2 of 1200 Åis formed on the silicon nitride film. A polycrystalline silicon film constructing an active region is formed on a gate insulating film constituted of the silicon nitride film and the silicon oxide film. By forming the silicon oxide film in a sufficient thickness of 1200 Åor more, and further forming the silicon nitride film 23 of 400 Åor more, a thin-film transistor cannot easily be influenced by a stepped portion formed by the gate electrode, and withstanding voltage of the gate insulating film of the thin-film transistor can be enhanced.

摘要翻译： 在基板上设置有朝向基板膨胀的具有梯形构造的截面的栅电极。 栅电极被覆有厚度T1为400埃的氮化硅膜，并且在氮化硅膜上形成厚度为T2的氧化硅膜。 在由氮化硅膜和氧化硅膜构成的栅极绝缘膜上形成构成有源区的多晶硅膜。 通过以足够的厚度形成氧化硅膜，并且进一步形成400以上的氮化硅膜23，薄膜晶体管不容易受到由栅电极形成的台阶部分的影响，耐电压 可以提高薄膜晶体管的栅极绝缘膜。

公开(公告)号：US06265730B1

公开(公告)日：2001-07-24

申请号：US09161870

申请日：1998-09-28

申请人： Shiro Nakanishi ,  Tsutomu Yamada

发明人： Shiro Nakanishi ,  Tsutomu Yamada

IPC分类号： H01L29786

CPC分类号： H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678

摘要： A thin-film transistor is provided in which the thickness of the insulating film is optimized. A gate electrode is formed on a transparent substrate. A silicon nitride film and a silicon oxide film, acting as a gate insulating film, are formed over the transparent substrate. A polycrystalline silicon film, being a semiconductor film, is formed acting as an active region. A stopper is formed on the polycrystalline silicon film corresponding to the gate electrode. A silicon oxide film and a silicon nitride film, acting as an interlayer insulating film, are deposited as to cover the stopper region. The total film thickness T1 of the stopper and the silicon oxide film is formed to be thinner than (the thickness T2 of the silicon nitride film×8000 Å)½. This structure allows hydrogen atoms to be sufficiently supplied from the silicon nitride film into the polycrystalline silicon film via the stopper and the silicon oxide film, so that crystalline defects in the polycrystalline silicon film can be filled with the hydrogen atoms.

摘要翻译： 提供了薄膜晶体管，其中绝缘膜的厚度被优化。 在透明基板上形成栅电极。 在透明基板上形成用作栅极绝缘膜的氮化硅膜和氧化硅膜。 作为半导体膜的多晶硅膜被形成为起主动区域的作用。 在与栅电极相对应的多晶硅膜上形成止动件。 作为层间绝缘膜的氧化硅膜和氮化硅膜被沉积以覆盖阻挡区域。 阻挡层和氧化硅膜的总膜厚T1形成为比（氮化硅膜的厚度T2）薄。 这种结构使得氢原子能够通过阻挡层和氧化硅膜从氮化硅膜充分供给到多晶硅膜中，从而可以用氢原子填充多晶硅膜中的晶体缺陷。

公开(公告)号：US07045818B2

公开(公告)日：2006-05-16

申请号：US10818425

申请日：2004-04-05

申请人： Yushi Jinno ,  Shiro Nakanishi ,  Kyoko Hirai ,  Tsutomu Yamada ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Yushi Jinno ,  Shiro Nakanishi ,  Kyoko Hirai ,  Tsutomu Yamada ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L31/20 ,  H01L29/04 ,  H01L21/00

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L29/66765 ,  H01L29/78621

摘要： In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.

摘要翻译： 在用于TFT液晶显示系统的半导体器件的制造工艺中，在开始结晶非晶硅（a-Si）之前，进行脱氢退火以不仅降低p-Si膜中的氢的密度 （13）至5×10 20原子/ cm 3以上，同时也防止由于可能存在过剩氢气而导致的阻塞a-Si膜（13）的结晶 电影。 在用等离子体氮化物膜形式的层间绝缘膜（15）覆盖的p-Si膜（13）上，然后在氮气气氛中在350℃至400℃的温度下进行退火，一个 至3小时，更优选400℃2小时。 结果是，p-Si膜（13）中的氢原子有效地终止膜的悬挂键，因此不会变得过大，从而改善了半导体器件的电特性。

公开(公告)号：US06750086B2

公开(公告)日：2004-06-15

申请号：US09049353

申请日：1998-03-27

申请人： Yushi Jinno ,  Shiro Nakanishi ,  Kyoko Hirai ,  Tsutomu Yamada ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Yushi Jinno ,  Shiro Nakanishi ,  Kyoko Hirai ,  Tsutomu Yamada ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L2100

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L29/66765 ,  H01L29/78621

摘要： In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.

摘要翻译： 在用于TFT液晶显示系统的半导体器件的制造工艺中，在开始结晶非晶硅（a-Si）之前，进行脱氢退火以不仅降低p-Si膜中的氢的密度 （13）〜5×10 20原子/ cm 3以下，同时也防止由于膜中剩余的氢过量而导致的阻塞a-Si膜的结晶化。 在用等离子体氮化物膜形式的层间绝缘膜（15）覆盖的p-Si膜（13）上，然后在氮气气氛中在350℃至400℃的温度下进行退火，一个 至3小时，更优选400℃2小时。 结果是，p-Si膜（13）中的氢原子有效地终止膜的悬挂键，因此不会变得过大，从而改善了半导体器件的电特性。

公开(公告)号：US06335232B1

公开(公告)日：2002-01-01

申请号：US09165771

申请日：1998-10-02

申请人： Mitsutaka Ohori ,  Shiro Nakanishi

发明人： Mitsutaka Ohori ,  Shiro Nakanishi

IPC分类号： H01L2144

CPC分类号： H01L27/1285 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678

摘要： On a transparent substrate where a gate electrode is formed, an amorphous silicon film is deposited by plasma CVD with a gate insulating film interposed therebetween. The silicon film is heated in an nitrogen atmosphere at 430±20° C. for an hour or longer to discharge hydrogen remaining in the film when it is formed. The silicon film is then melted by laser irradiation to crystallize, to thereby form a polycrystalline silicon film serving as an active region. Thus, when amorphous silicon is crystallized to form a polycrystalline silicon film, it is made possible to prevent creation of a rough film surface and penetration of impurity ions in the atmosphere into the polycrystalline silicon.

摘要翻译： 在形成栅电极的透明基板上，通过等离子体CVD沉积非晶硅膜，其间插入有栅极绝缘膜。 将硅膜在氮气气氛中在430±20℃下加热1小时或更长时间，以便在其形成时排出残留在膜中的氢。 然后通过激光照射使硅膜熔融结晶，从而形成用作活性区域的多晶硅膜。 因此，当非晶硅结晶以形成多晶硅膜时，可以防止粗糙膜表面的产生和杂质离子在大气中的渗入到多晶硅中。

公开(公告)号：US6103557A

公开(公告)日：2000-08-15

申请号：US169833

申请日：1998-10-12

申请人： Shiro Nakanishi

发明人： Shiro Nakanishi

IPC分类号： H01L21/205 ,  H01L21/00 ,  H01L21/31 ,  H01L21/336 ,  H01L21/677 ,  H01L29/786 ,  H01L21/4763

CPC分类号： H01L21/67167 ,  H01L21/67207 ,  H01L21/67745 ,  H01L29/66765

摘要： First through fourth film formation chambers PC1 to PC4 are disposed in the periphery of a transfer chamber TC. If, for example, the ratio of the time required to form gate insulating films to the time required to form the silicon film as a semiconductor film is 1:3, a silicon nitride film and silicon oxide film are formed in the first through third film formation films PC1 to PC3 to become gate insulating films, and an amorphous silicon layer is formed in the fourth film formation chamber PC4 to become an active region. This makes it possible to perform formation of the amorphous silicon layer, which requires film cleaning, in a film formation chamber different from the film formation chamber for other films, and to manufacture thin-film transistors at high productivity.