公开(公告)号：US07045818B2

公开(公告)日：2006-05-16

申请号：US10818425

申请日：2004-04-05

申请人： Yushi Jinno ,  Shiro Nakanishi ,  Kyoko Hirai ,  Tsutomu Yamada ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Yushi Jinno ,  Shiro Nakanishi ,  Kyoko Hirai ,  Tsutomu Yamada ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L31/20 ,  H01L29/04 ,  H01L21/00

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L29/66765 ,  H01L29/78621

摘要： In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.

摘要翻译： 在用于TFT液晶显示系统的半导体器件的制造工艺中，在开始结晶非晶硅（a-Si）之前，进行脱氢退火以不仅降低p-Si膜中的氢的密度 （13）至5×10 20原子/ cm 3以上，同时也防止由于可能存在过剩氢气而导致的阻塞a-Si膜（13）的结晶 电影。 在用等离子体氮化物膜形式的层间绝缘膜（15）覆盖的p-Si膜（13）上，然后在氮气气氛中在350℃至400℃的温度下进行退火，一个 至3小时，更优选400℃2小时。 结果是，p-Si膜（13）中的氢原子有效地终止膜的悬挂键，因此不会变得过大，从而改善了半导体器件的电特性。

公开(公告)号：US06750086B2

公开(公告)日：2004-06-15

申请号：US09049353

申请日：1998-03-27

申请人： Yushi Jinno ,  Shiro Nakanishi ,  Kyoko Hirai ,  Tsutomu Yamada ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Yushi Jinno ,  Shiro Nakanishi ,  Kyoko Hirai ,  Tsutomu Yamada ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L2100

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L29/66765 ,  H01L29/78621

摘要： In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.

摘要翻译： 在用于TFT液晶显示系统的半导体器件的制造工艺中，在开始结晶非晶硅（a-Si）之前，进行脱氢退火以不仅降低p-Si膜中的氢的密度 （13）〜5×10 20原子/ cm 3以下，同时也防止由于膜中剩余的氢过量而导致的阻塞a-Si膜的结晶化。 在用等离子体氮化物膜形式的层间绝缘膜（15）覆盖的p-Si膜（13）上，然后在氮气气氛中在350℃至400℃的温度下进行退火，一个 至3小时，更优选400℃2小时。 结果是，p-Si膜（13）中的氢原子有效地终止膜的悬挂键，因此不会变得过大，从而改善了半导体器件的电特性。

公开(公告)号：US5721601A

公开(公告)日：1998-02-24

申请号：US532484

申请日：1995-09-22

申请人： Toshifumi Yamaji ,  Kou Masahara ,  Nobuhiko Oda ,  Koji Suzuki ,  Shiro Nakanishi ,  Hisashi Abe ,  Kiyoshi Yoneda ,  Yoshihiro Morimoto

发明人： Toshifumi Yamaji ,  Kou Masahara ,  Nobuhiko Oda ,  Koji Suzuki ,  Shiro Nakanishi ,  Hisashi Abe ,  Kiyoshi Yoneda ,  Yoshihiro Morimoto

IPC分类号： G02F1/1343 ,  G02F1/1333 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L29/786

CPC分类号： G02F1/136227 ,  G02F2001/133357

摘要： A liquid crystal display unit is described, which includes a first substrate, a second substrate opposing to the first substrate, pixel driving elements, first and second insulation layers, a planarizing film and a liquid crystal layer. The pixel driving elements are disposed on the first substrate and between the first and second substrates. The first insulation layer is deposited over the first substrate and the pixel driving elements. The planarizing film is formed on the first insulation layer. This planarizing film provides a substantially flat surface over the first substrate to minimize a height of a step present between an area corresponding to each pixel driving element and an area locating adjacent to the pixel driving element on the first substrate. The second insulation layer is formed on the planarizing film. The display electrodes are formed on the second insulation layer and electrically connected to the pixel driving elements, respectively. The liquid crystal layer is located between the first substrate and said second substrate.

摘要翻译： 描述了一种液晶显示单元，其包括第一基板，与第一基板相对的第二基板，像素驱动元件，第一和第二绝缘层，平坦化膜和液晶层。 像素驱动元件设置在第一基板上并且在第一和第二基板之间。 第一绝缘层沉积在第一衬底和像素驱动元件上。 平坦化膜形成在第一绝缘层上。 该平坦化膜在第一基板上提供基本上平坦的表面，以使在与每个像素驱动元件相对应的区域和与第一基板上的像素驱动元件相邻定位的区域之间存在的台阶的高度最小化。 第二绝缘层形成在平坦化膜上。 显示电极分别形成在第二绝缘层上并与像素驱动元件电连接。 液晶层位于第一基板和第二基板之间。

公开(公告)号：US07163850B2

公开(公告)日：2007-01-16

申请号：US10945233

申请日：2004-09-20

申请人： Nobuhiko Oda ,  Toshifumi Yamaji ,  Shiro Nakanishi ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Nobuhiko Oda ,  Toshifumi Yamaji ,  Shiro Nakanishi ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L21/00

CPC分类号： H01L29/66765 ,  H01L27/12 ,  H01L27/1248 ,  H01L29/78621 ,  H01L29/78678

摘要： In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

摘要翻译： 在底栅型薄膜晶体管制造方法中，在离子掺杂之后，去除离子塞（55）。 离子限制器（55）不会留在位于栅电极正上方的层间绝缘膜（8）中。 薄膜晶体管具有这样的结构：离子阻挡层（55）和层间绝缘层至少与半导体层（4）的沟道区域直接接触。 层间绝缘膜与半导体层4之间的界面附近的杂质浓度为10原子/ cc以下。 这种结构可以防止反向通道现象，并减少由制造变化引起的特性变化。

公开(公告)号：US20050042809A1

公开(公告)日：2005-02-24

申请号：US10946037

申请日：2004-09-21

申请人： Nobuhiko Oda ,  Toshifumi Yamaji ,  Shiro Nakanishi ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Nobuhiko Oda ,  Toshifumi Yamaji ,  Shiro Nakanishi ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： G02F1/136 ,  G02F1/00 ,  G02F1/1368 ,  G09F9/30 ,  H01L21/00 ,  H01L21/336 ,  H01L21/77 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04 ,  H01L29/786

CPC分类号： H01L29/66765 ,  H01L27/12 ,  H01L27/1248 ,  H01L29/78621 ,  H01L29/78678

摘要： In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

公开(公告)号：US20050035348A1

公开(公告)日：2005-02-17

申请号：US10945233

申请日：2004-09-20

申请人： Nobuhiko Oda ,  Toshifumi Yamaji ,  Shiro Nakanishi ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Nobuhiko Oda ,  Toshifumi Yamaji ,  Shiro Nakanishi ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： G02F1/136 ,  G02F1/00 ,  G02F1/1368 ,  G09F9/30 ,  H01L21/00 ,  H01L21/336 ,  H01L21/77 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04 ,  H01L29/786

CPC分类号： H01L29/66765 ,  H01L27/12 ,  H01L27/1248 ,  H01L29/78621 ,  H01L29/78678

摘要： In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

摘要翻译： 在底栅型薄膜晶体管制造方法中，在离子掺杂之后，去除离子塞（55）。 离子限制器（55）不会留在位于栅电极正上方的层间绝缘膜（8）中。 薄膜晶体管具有这样的结构：离子阻挡层（55）和层间绝缘层至少与半导体层（4）的沟道区域直接接触。 层间绝缘膜和半导体层4之间的界面附近的杂质浓度为10 18原子/ cc以下。 这种结构可以防止反向通道现象，并减少由制造变化引起的特性变化。

公开(公告)号：US06815272B2

公开(公告)日：2004-11-09

申请号：US10008389

申请日：2001-11-06

申请人： Nobuhiko Oda ,  Toshifumi Yamaji ,  Shiro Nakanishi ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Nobuhiko Oda ,  Toshifumi Yamaji ,  Shiro Nakanishi ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L2100

CPC分类号： H01L29/66765 ,  H01L27/12 ,  H01L27/1248 ,  H01L29/78621 ,  H01L29/78678

摘要： In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper is removed. The ion stopper does not remain in the interlayer insulating film lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper, and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer. The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

摘要翻译： 在底栅型薄膜晶体管制造方法中，在离子掺杂之后，去除离子塞。 离子限制器不会残留在位于栅电极正上方的层间绝缘膜中。 薄膜晶体管具有这样的结构：离子阻挡层和层间绝缘层至少与半导体层的沟道区域直接接触。 层间绝缘膜和半导体层4之间的界面附近的杂质浓度为10 18原子/ cc以下。 这种结构可以防止反向通道现象，并减少由制造变化引起的特性变化。

公开(公告)号：US07439114B2

公开(公告)日：2008-10-21

申请号：US11207458

申请日：2005-08-18

申请人： Hidenori Ogata ,  Ken Wakita ,  Kiyoshi Yoneda ,  Yoshihiro Morimoto ,  Tsutomu Yamada ,  Kazuhiro Imao ,  Takashi Kuwahara

发明人： Hidenori Ogata ,  Ken Wakita ,  Kiyoshi Yoneda ,  Yoshihiro Morimoto ,  Tsutomu Yamada ,  Kazuhiro Imao ,  Takashi Kuwahara

IPC分类号： H01L21/00

CPC分类号： H01L21/02686 ,  H01L21/02532 ,  H01L21/02691 ,  H01L21/2026 ,  H01L21/268 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78675

摘要： For obtaining p-Si by irradiating a laser beam to an a-Si layer to polycrystallize, an energy level in a region to be irradiated by the laser beam is set such that a level at the rear area of the region along a scan direction of the laser beam is lower than that at the front area or the center area of the region. The energy level at the front area or the center area of the region is set such that it is substantially equal to or more than the upper limit energy level which maximizes a grain size of the p-Si obtained. Since an energy profile is set as described above, when the laser beam is scanned on the a-Si layer, an irradiated energy of the laser on the region is gradually lowered from the upper limit as the laser beam passes through, which allows the semiconductor layer to be annealed within an optimal energy level during the latter half of the annealing process.

摘要翻译： 为了通过将激光束照射到a-Si层进行多晶化来获得p-Si，将由激光束照射的区域中的能级设定为使沿着扫描方向的区域的后部区域的电平 激光束比区域前区域或中心区域低。 该区域的前部区域或中心区域的能级被设定为使得所获得的p-Si的粒径最大化的上限能级基本上等于或大于该能级。 由于如上所述设定能量分布，当在a-Si层上扫描激光束时，该区域上的激光的照射能量随着激光束通过而从上限逐渐降低，这允许半导体 在退火过程的后半期间在最佳能级内退火的层。

公开(公告)号：US20050287825A1

公开(公告)日：2005-12-29

申请号：US11207458

申请日：2005-08-18

申请人： Hidenori Ogata ,  Ken Wakita ,  Kiyoshi Yoneda ,  Yoshihiro Morimoto ,  Tsutomu Yamada ,  Kazuhiro Imao ,  Takashi kuwahara

发明人： Hidenori Ogata ,  Ken Wakita ,  Kiyoshi Yoneda ,  Yoshihiro Morimoto ,  Tsutomu Yamada ,  Kazuhiro Imao ,  Takashi kuwahara

IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L21/20 ,  H01L21/26 ,  H01L21/268 ,  H01L21/3205 ,  H01L21/324 ,  H01L21/336 ,  H01L21/42 ,  H01L21/4763 ,  H01L21/477 ,  H01L21/77 ,  H01L21/84 ,  H01L29/786

CPC分类号： H01L21/02686 ,  H01L21/02532 ,  H01L21/02691 ,  H01L21/2026 ,  H01L21/268 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78675

摘要： For obtaining p-Si by irradiating a laser beam to an a-Si layer to polycrystallize, an energy level in a region to be irradiated by the laser beam is set such that a level at the rear area of the region along a scan direction of the laser beam is lower than that at the front area or the center area of the region. The energy level at the front area or the center area of the region is set such that it is substantially equal to or more than the upper limit energy level which maximizes a grain size of the p-Si obtained. Since an energy profile is set as described above, when the laser beam is scanned on the a-Si layer, an irradiated energy of the laser on the region is gradually lowered from the upper limit as the laser beam passes through, which allows the semiconductor layer to be annealed within an optimal energy level during the latter half of the annealing process.

摘要翻译： 为了通过将激光束照射到a-Si层进行多晶化来获得p-Si，将由激光束照射的区域中的能级设定为使沿着扫描方向的区域的后部区域的电平 激光束比区域前区域或中心区域低。 该区域的前部区域或中心区域的能级被设定为使得所获得的p-Si的粒径最大化的上限能级基本上等于或大于该能级。 由于如上所述设定能量分布，当在a-Si层上扫描激光束时，该区域上的激光的照射能量随着激光束通过而从上限逐渐降低，这允许半导体 在退火过程的后半期间在最佳能级内退火的层。

公开(公告)号：US07061017B2

公开(公告)日：2006-06-13

申请号：US10714829

申请日：2003-11-14

申请人： Hidenori Ogata ,  Ken Wakita ,  Kiyoshi Yoneda ,  Yoshihiro Morimoto ,  Tsutomu Yamada ,  Kazuhiro Imao ,  Takashi Kuwahara

发明人： Hidenori Ogata ,  Ken Wakita ,  Kiyoshi Yoneda ,  Yoshihiro Morimoto ,  Tsutomu Yamada ,  Kazuhiro Imao ,  Takashi Kuwahara

IPC分类号： H01L29/76

CPC分类号： H01L21/02686 ,  H01L21/02532 ,  H01L21/02691 ,  H01L21/2026 ,  H01L21/268 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78675

摘要： For obtaining p-Si by irradiating a laser beam to an a-Si layer to polycrystallize, an energy level in a region to be irradiated by the laser beam is set such that a level at the rear area of the region along a scan direction of the laser beam is lower than that at the front area or the center area of the region. The energy level at the front area or the center area of the region is set such that it is substantially equal to or more than the upper limit energy level which maximizes a grain size of the p-Si obtained. Since an energy profile is set as described above, when the laser beam is scanned on the a-Si layer, an irradiated energy of the laser on the region is gradually lowered from the upper limit as the laser beam passes through, which allows the semiconductor layer to be annealed within an optimal energy level during the latter half of the annealing process.

摘要翻译： 为了通过将激光束照射到a-Si层进行多晶化来获得p-Si，将由激光束照射的区域中的能级设定为使沿着扫描方向的区域的后部区域的电平 激光束比区域前区域或中心区域低。 该区域的前部区域或中心区域的能级被设定为使得所获得的p-Si的粒径最大化的上限能级基本上等于或大于该能级。 由于如上所述设定能量分布，当在a-Si层上扫描激光束时，该区域上的激光的照射能量随着激光束通过而从上限逐渐降低，这允许半导体 在退火过程的后半期间在最佳能级内退火的层。