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    Semiconductor device and manufacturing method thereof
    13.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US09006729B2

    公开(公告)日：2015-04-14

    申请号：US12943558

    申请日：2010-11-10

    申请人： Kengo Akimoto ,  Junichiro Sakata ,  Yoshiaki Oikawa ,  Shunpei Yamazaki

    发明人： Kengo Akimoto ,  Junichiro Sakata ,  Yoshiaki Oikawa ,  Shunpei Yamazaki

    IPC分类号： H01L29/10 ,  H01L29/12 ,  H01L29/786 ,  H01L29/45

    CPC分类号： H01L29/7869 ,  H01L29/45

    摘要： It is an object to provide a method for manufacturing a highly reliable semiconductor device having a thin film transistor formed using an oxide semiconductor and having stable electric characteristics. The semiconductor device includes an oxide semiconductor film overlapping with a gate electrode with a gate insulating film interposed therebetween; and a source electrode and a drain electrode which are in contact with the oxide semiconductor film. The source electrode and the drain electrode include a mixture, metal compound, or alloy containing one or more of a metal with a low electronegativity such as titanium, magnesium, yttrium, aluminum, tungsten, and molybdenum. The concentration of hydrogen in the source electrode and the drain electrode is 1.2 times, preferably 5 times or more as high as that of hydrogen in the oxide semiconductor film.

    摘要翻译： 本发明的目的是提供一种用于制造具有使用氧化物半导体形成并且具有稳定的电特性的薄膜晶体管的高度可靠的半导体器件的方法。 半导体器件包括与栅电极重叠的氧化物半导体膜，其间插入有栅极绝缘膜; 以及与氧化物半导体膜接触的源电极和漏电极。 源电极和漏极包括含有一种或多种具有低电负性的金属如钛，镁，钇，铝，钨和钼的混合物，金属化合物或合金。 源电极和漏电极中的氢浓度是氧化物半导体膜中的氢的浓度的1.2倍，优选为5倍以上。

    Semiconductor device
    15.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08669556B2

    公开(公告)日：2014-03-11

    申请号：US13307398

    申请日：2011-11-30

    申请人： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Hiroki Ohara ,  Tatsuya Honda ,  Takatsugu Omata ,  Yusuke Nonaka ,  Masahiro Takahashi ,  Akiharu Miyanaga

    发明人： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Hiroki Ohara ,  Tatsuya Honda ,  Takatsugu Omata ,  Yusuke Nonaka ,  Masahiro Takahashi ,  Akiharu Miyanaga

    IPC分类号： H01L29/04

    CPC分类号： H01L29/78696 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

    摘要： An oxide semiconductor film which has more stable electric conductivity is provided. Further, a semiconductor device which has stable electric characteristics and high reliability is provided by using the oxide semiconductor film. An oxide semiconductor film includes a crystalline region, and the crystalline region includes a crystal in which an a-b plane is substantially parallel with a surface of the film and a c-axis is substantially perpendicular to the surface of the film; the oxide semiconductor film has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like. By using such an oxide semiconductor film for a transistor, a highly reliable semiconductor device having stable electric characteristics can be provided.

    摘要翻译： 提供了具有更稳定的导电性的氧化物半导体膜。 此外，通过使用氧化物半导体膜提供具有稳定的电特性和高可靠性的半导体器件。 氧化物半导体膜包括结晶区域，并且结晶区域包括其中a-b平面基本上平行于膜的表面并且c轴基本上垂直于膜的表面的晶体; 氧化物半导体膜具有稳定的导电性，并且相对于可见光，紫外线等的照射而言更加电稳定。 通过使用这种用于晶体管的氧化物半导体膜，可以提供具有稳定电特性的高可靠性半导体器件。

    Method for manufacturing a semiconductor device with impurity doped oxide semiconductor
    16.
    发明授权
    Method for manufacturing a semiconductor device with impurity doped oxide semiconductor 有权
    制造具有杂质掺杂氧化物半导体的半导体器件的方法

    公开(公告)号：US08481377B2

    公开(公告)日：2013-07-09

    申请号：US13026518

    申请日：2011-02-14

    申请人： Kengo Akimoto ,  Ryosuke Watanabe ,  Masashi Tsubuku ,  Shunpei Yamazaki

    发明人： Kengo Akimoto ,  Ryosuke Watanabe ,  Masashi Tsubuku ,  Shunpei Yamazaki

    IPC分类号： H01L21/338

    CPC分类号： H01L29/7869 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618

    摘要： It is an object to provide a semiconductor device including an oxide semiconductor, in which miniaturization of a transistor is achieved and the concentration of an electric field is relieved. The width of a gate electrode is reduced and a space between a source electrode layer and a drain electrode layer is shortened. By adding a rare gas in a self-alignment manner with the use of a gate electrode as a mask, a low-resistance region in contact with a channel formation region can be provided in an oxide semiconductor layer. Accordingly, even when the width of the gate electrode, that is, the line width of a gate wiring is small, the low-resistance region can be provided with high positional accuracy, so that miniaturization of a transistor can be realized.

    摘要翻译： 本发明的目的是提供一种包括氧化物半导体的半导体器件，其中实现了晶体管的小型化和电场的集中。 栅电极的宽度减小，源电极层和漏电极层之间的间隔缩短。 通过使用栅电极作为掩模以自对准的方式添加稀有气体，可以在氧化物半导体层中提供与沟道形成区域接触的低电阻区域。 因此，即使栅电极的宽度，即栅极配线的线宽小，也能够提供高电位区域的高位置精度，能够实现晶体管的小型化。

    Method for manufacturing semiconductor device
    17.
    发明授权
    Method for manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US08871565B2

    公开(公告)日：2014-10-28

    申请号：US13222513

    申请日：2011-08-31

    申请人： Shunpei Yamazaki ,  Yusuke Nonaka ,  Takayuki Inoue ,  Masashi Tsubuku ,  Kengo Akimoto ,  Akiharu Miyanaga

    发明人： Shunpei Yamazaki ,  Yusuke Nonaka ,  Takayuki Inoue ,  Masashi Tsubuku ,  Kengo Akimoto ,  Akiharu Miyanaga

    IPC分类号： H01L21/44 ,  H01L29/786

    CPC分类号： H01L29/78606 ,  H01L23/552 ,  H01L23/564 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.

    摘要翻译： 本发明的目的是制造具有稳定的电特性和高可靠性的氧化物半导体膜的半导体装置。 通过利用包含在氧化物半导体靶中的多种原子的原子量的差异，形成结晶氧化物半导体膜，而不进行多个步骤，优选将低原子量的锌沉积在氧化物绝缘膜上 形成包含锌的晶种; 并且具有高原子量的锡，铟等沉积在晶种上同时引起晶体生长。 此外，通过使用具有包含锌作为核的六方晶系结构的晶种进行晶体生长来形成结晶氧化物半导体膜，从而形成单晶氧化物半导体膜或大致单晶氧化物半导体膜。

    Semiconductor device
    19.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08530892B2

    公开(公告)日：2013-09-10

    申请号：US12917569

    申请日：2010-11-02

    申请人： Shunpei Yamazaki ,  Suzunosuke Hiraishi ,  Kengo Akimoto ,  Junichiro Sakata

    发明人： Shunpei Yamazaki ,  Suzunosuke Hiraishi ,  Kengo Akimoto ,  Junichiro Sakata

    IPC分类号： H01L29/10 ,  H01L21/16

    CPC分类号： H01L29/45 ,  G02F1/1368 ,  H01L29/7869

    摘要： An object is, in a thin film transistor including an oxide semiconductor layer, to reduce contact resistance between the oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer. The source and drain electrode layers have a stacked-layer structure of two or more layers in which a layer in contact with the oxide semiconductor layer is formed using an oxide of a metal whose work function is lower than the work function of the oxide semiconductor layer or an oxide of an alloy containing such a metal. Layers other than the layer in contact with the oxide semiconductor layer of the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, or W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.

    摘要翻译： 在包括氧化物半导体层的薄膜晶体管中，目的是减少氧化物半导体层与与氧化物半导体层电连接的源电极层和漏电极层之间的接触电阻。 源极和漏极层具有两层或多层的层叠结构，其中使用其功函数低于氧化物半导体层的功函数的金属的氧化物形成与氧化物半导体层接触的层 或含有这种金属的合金的氧化物。 使用选自Al，Cr，Cu，Ta，Ti，Mo或W的元素形成与源极和漏极电极层的氧化物半导体层接触的层以外的层，包含任何这些元素作为 组分，包含任何这些元素组合的合金等。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
    20.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE 有权
    用于制造半导体器件的半导体器件和方法

    公开(公告)号：US20110084269A1

    公开(公告)日：2011-04-14

    申请号：US12899265

    申请日：2010-10-06

    申请人： Shunpei Yamazaki ,  Suzunosuke Hiraishi ,  Kengo Akimoto ,  Junichiro Sakata

    发明人： Shunpei Yamazaki ,  Suzunosuke Hiraishi ,  Kengo Akimoto ,  Junichiro Sakata

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/45

    摘要： An object is to reduce contact resistance between an oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer in a thin film transistor including the oxide semiconductor layer. The source and drain electrode layers have a stacked structure of two or more layers. In this stack of layers, a layer in contact with the oxide semiconductor layer is a thin indium layer or a thin indium-alloy layer. Note that the oxide semiconductor layer contains indium. A second layer or second and any of subsequent layers in the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.

    摘要翻译： 本发明的目的是减少在包括氧化物半导体层的薄膜晶体管中氧化物半导体层与与氧化物半导体层电连接的源极和漏极电极层之间的接触电阻。 源极和漏极电极层具有两层或更多层的堆叠结构。 在该堆叠层中，与氧化物半导体层接触的层是薄的铟层或薄的铟 - 合金层。 注意，氧化物半导体层含有铟。 使用选自Al，Cr，Cu，Ta，Ti，Mo和W的元素来形成源极和漏极电极层中的第二层或第二层以及后续层中的任何一层，包含任何这些元素作为组分的合金， 合并这些元素中的任何一种的合金等。