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11.发明授权公开(公告)号：US11817868B2
公开(公告)日：2023-11-14
申请号：US17855525
申请日：2022-06-30
Applicant: Silicon Laboratories Inc.
Inventor： John M. Khoury
CPC classification number: H03L7/0991 , G06F1/022 , H03B5/1206 , H03B5/1212 , H03B5/1218 , H03B5/1228 , H03B5/1243 , H03B5/1265 , H03L7/085 , H03L7/099 , H03L7/0992 , H03L7/148 , H03L7/189 , H03L7/1974
Abstract: An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.
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公开(公告)号：US20230337160A1
公开(公告)日：2023-10-19
申请号：US18215488
申请日：2023-06-28
Applicant: Silicon Laboratories Inc.
Inventor： John M. Khoury , Yan Zhou , Michael A. Wu , Wentao Li
IPC: H04W56/00
CPC classification number: H04W56/0035 , H04W56/005 , H04W4/023
Abstract: In at least one embodiment, a method for measuring a distance between a first communications device including a first local oscillator and a second communications device including a second local oscillator includes unwrapping N phase values to generate N unwrapped phase values. N is an integer greater than one. Each of the N phase values indicate an instantaneous phase of a received signal. The method includes averaging the N unwrapped phase values to generate an average phase value. The method includes wrapping the average phase value to generate a final phase measurement of the first local oscillator with respect to the second local oscillator.
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公开(公告)号：US11431359B2
公开(公告)日：2022-08-30
申请号：US17107327
申请日：2020-11-30
Applicant: Silicon Laboratories Inc.
Inventor： Michael A. Wu , Wentao Li , Mitchell Reid , John M. Khoury , Yan Zhou
Abstract: A method for operating a radio frequency communications system includes, while operating a first radio frequency communications device in a calibration mode, for each setting of a plurality of settings of a programmable gain amplifier in a receiver of the first radio frequency communications device configured in a zero-intermediate frequency mode of operation, generating an estimate of a DC offset in each of a plurality of digital samples received from an analog circuit path including the programmable gain amplifier, and storing in a corresponding storage element, a compensation value based on the estimate.
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公开(公告)号：US20210175855A1
公开(公告)日：2021-06-10
申请号：US16705868
申请日：2019-12-06
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L. Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to use the delayed oscillating signal for transmitting a signal, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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公开(公告)号：US10727787B2
公开(公告)日：2020-07-28
申请号：US15705961
申请日：2017-09-15
Applicant: Silicon Laboratories Inc.
Inventor： John M. Khoury
Abstract: A transmitter generates programmable upstream and downstream signal pulses for transmission through a fluid whose flow rate is being measured. A receiver receives the upstream and downstream signal pulses and stores digital representations of the pulses. A multiple pass algorithm such as a time domain windowing function and/or an algorithm that equalizes amplitude operates on the stored digital representations prior to demodulation. A quadrature demodulator generates in-phase and quadrature components of the digital representations and an arctangent function using the in-phase and quadrature components determines angles associated with the upstream and downstream signal pulses. The difference between the upstream and downstream angles, from which a difference in time of flight between the upstream and downstream signal pulses can be derived, is used to determine flow rate.
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Patent Agency Ranking
公开(公告)号：US20190238166A1
公开(公告)日：2019-08-01
申请号：US15883232
申请日：2018-01-30
Applicant: Silicon Laboratories Inc.
Inventor： Phillip Matthews , Paul I. Zavalney , John M. Khoury , Karma S. Bhutia
Abstract: Systems and methods are disclosed for spur mitigation for pulse signal drivers in radio frequency (RF) devices. An RF integrated circuit includes RF circuitry and analog-to-digital (ADC) circuitry. The RF circuitry operates using a local oscillator (LO) clock to receive and/or transmit RF signals, and the ADC circuitry samples one or more analog input signals and has internal timing based upon a raw digital clock. A retime circuit receives the raw digital clock and the LO clock and has a retimed clock as an output. The retimed clock represents the raw digital clock retimed with the LO clock. While other digital circuitry is timed using the raw digital clock, one or more drivers are timed by the retimed clock and provide pulse output signals to output pads. Having the drivers timed with the retimed clock and other digital circuitry timed with the raw digital clock improves overall performance.
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17.发明申请公开(公告)号：US20180351593A1
公开(公告)日：2018-12-06
申请号：US15609412
申请日：2017-05-31
Applicant: Silicon Laboratories Inc.
Inventor： Navin Harwalkar , Arup Mukherji , John M. Khoury
CPC classification number: H04B1/16 , H03D7/14 , H03F3/189 , H03F2200/144 , H03F2200/165 , H03F2200/21 , H03F2200/294 , H03F2200/451 , H03G1/0005 , H03H7/0153
Abstract: An apparatus includes a radio-frequency (RF) receiver. The RF receiver includes a single-balanced passive mixer driven by the output of a low noise amplifier (LNA) and a passive filter driven by an output of the single-balanced passive mixer. The RF receiver further includes a programmable gain amplifier (PGA) having an input resistance that generates noise, where the PGA is driven by an output of the passive filter, and the noise generated by the input resistance of the PGA is suppressed.
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公开(公告)号：US10063203B1
公开(公告)日：2018-08-28
申请号：US15697859
申请日：2017-09-07
Applicant: Silicon Laboratories Inc.
Inventor： Navin Harwalkar , John M. Khoury
CPC classification number: H03G3/20 , G05F1/67 , H02M3/156 , H02M2001/0022 , H03G3/3052 , H03G3/3068 , H03M1/66
Abstract: Embodiments of power detector circuits and related methods to compensate for undesired DC offsets generated within power detector circuits are disclosed. Input signals having input frequencies are received and converted to a magnitude signal, and reference signals are also generated. The magnitude signal may include a DC component proportional to a power of the input signal along with undesired DC offsets. The reference signal may include a DC component proportional to a power of at least one input reference signal along with undesired DC offsets. To compensate for errors introduced by the DC offsets, a DC offset calibration signal or a gain are determined in a calibration mode and then applied in a normal mode to compensate for the DC offsets. For the calibration mode, a difference between the magnitude signal and the reference signal is compared to a threshold value to generate a power detection output signal.
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公开(公告)号：US20170110792A1
公开(公告)日：2017-04-20
申请号：US15390434
申请日：2016-12-23
Applicant: Silicon Laboratories Inc.
Inventor： David Le Goff , John M. Khoury , Mustafa Koroglu , Abdulkerim Coban , Ramin Khoini-Poorfard
Abstract: An apparatus includes a first integrated circuit (IC) that includes a first radio-frequency (RF) circuit to process RF signals, a first antenna port to couple to one or more antennas, and a first switch integrated in the first IC and coupled to the first antenna port. The apparatus further includes a second IC that includes a second RF circuit to process RF signals, a second antenna port to couple to the one or more antennas, and a second switch integrated in the second IC and coupled to the second antenna port.
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公开(公告)号：US20160149604A1
公开(公告)日：2016-05-26
申请号：US14549910
申请日：2014-11-21
Applicant: Silicon Laboratories Inc.
Inventor： John M. Khoury , Navin Harwalkar
CPC classification number: H04L27/06 , G01R19/2506 , G01R23/165 , H04B1/0021 , H04B2001/0416
Abstract: In one aspect, an apparatus includes: a mixer to receive a radio frequency (RF) signal and downconvert the RF signal into a second frequency signal; an amplifier coupled to the mixer to amplify the second frequency signal; an image rejection (IR) circuit coupled to the programmable gain amplifier (PGA) to orthogonally correct a gain and a phase of the amplified second frequency signal to output a corrected amplified second frequency signal; and a complex filter to filter the corrected amplified second frequency signal.
Abstract translation: 一方面，一种装置包括：混合器，用于接收射频（RF）信号，并将RF信号下变频为第二频率信号; 耦合到所述混频器以放大所述第二频率信号的放大器; 耦合到所述可编程增益放大器（PGA）的正交校正放大的第二频率信号的增益和相位以输出校正的放大的第二频率信号的图像抑制（IR）电路; 以及用于对经校正的放大后的第二频率信号进行滤波的复数滤波器。
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