公开(公告)号：US20230317496A1

公开(公告)日：2023-10-05

申请号：US18004156

申请日：2021-03-30

Applicant: Soitec

Inventor： Isabelle Bertrand ,  Frédéric Alibert ,  Romain Bouveyron ,  Walter Schwarzenbach

IPC: H01L21/683 ,  H01L21/324 ,  H01L27/12

CPC classification number: H01L21/6835 ,  H01L21/324 ,  H01L27/1203

Abstract: A carrier substrate comprises monocrystalline silicon, and has a front face and a back face. The carrier substrate comprises:



a surface region extending from the front face to a depth of between 800 nm and 2 microns, having less than 10 crystal-originated particles (COPs) (as detected by inspecting the surface using dark-field reflection microscopy);
an upper region extending from the front face to a depth of between a few microns and 40 microns and having an interstitial oxygen (Oi) content less than or equal to 7.5E17 Oi/cm3 and a resistivity higher than 500 ohm·cm, and
a lower region extending between the upper region and the back face and having a micro-defect (BMD) concentration greater than or equal to 1E8/cm3.




A method is used to manufacture such a carrier substrate.

公开(公告)号：US20230215760A1

公开(公告)日：2023-07-06

申请号：US17998894

申请日：2021-05-18

Applicant: Soitec

Inventor： Isabelle Bertrand ,  Walter Schwarzenbach ,  Frédéric Allibert

IPC: H01L21/762

CPC classification number: H01L21/76254

Abstract: A method for manufacturing a semiconductor-on-insulator substrate for radiofrequency applications, comprises: providing a P-doped semiconductor donor substrate; forming a sacrificial layer on the donor substrate; implanting atomic species through the sacrificial layer so as to form in the donor substrate an area of embrittlement defining a thin semiconductor layer that is to be transferred; removing the sacrificial layer from the donor substrate after the implantation; providing a supporting semiconductor substrate having an electrical resistivity greater than or equal to 500 Ω·cm; forming an electrically insulating layer on the supporting substrate; bonding the donor substrate on the supporting substrate, the thin semiconductor layer and the electrically insulating layer being at the interface of the bonding; detaching the donor substrate along the area of embrittlement so as to transfer the thin semiconductor layer from the donor substrate onto the supporting substrate.

公开(公告)号：US10297464B2

公开(公告)日：2019-05-21

申请号：US15577133

申请日：2016-06-01

Applicant: Soitec

Inventor： Marcel Broekaart ,  Luciana Capello ,  Isabelle Bertrand ,  Norbert Colombet

IPC: H01L21/324 ,  H01L21/322 ,  H01L21/84 ,  H01L21/66 ,  H01L29/10 ,  H01L21/762 ,  H01L21/268 ,  H01L21/67

Abstract: A process for the manufacture of a semiconductor element includes a stage of rapid heat treatment of a substrate comprising a charge-trapping layer, which is capable of damaging an RF characteristic of the substrate. The rapid heat treatment stage is followed by a healing heat treatment of the substrate between 700° C. and 1,100° C., for a period of time of at least 15 seconds.

公开(公告)号：US20180182640A1

公开(公告)日：2018-06-28

申请号：US15577133

申请日：2016-06-01

Applicant: Soitec

Inventor： Marcel Broekaart ,  Luciana Capello ,  Isabelle Bertrand ,  Norbert Colombet

IPC: H01L21/324 ,  H01L21/322 ,  H01L29/10 ,  H01L21/84 ,  H01L21/66

CPC classification number: H01L21/324 ,  H01L21/2686 ,  H01L21/3226 ,  H01L21/67115 ,  H01L21/76251 ,  H01L21/76254 ,  H01L21/84 ,  H01L22/14 ,  H01L29/1079

Abstract: A process for the manufacture of a semiconductor element includes a stage of rapid heat treatment of a substrate comprising a charge-trapping layer, which is capable of damaging an RF characteristic of the substrate. The rapid heat treatment stage is followed by a healing heat treatment of the substrate between 700° C. and 1100° C., for a period of time of at least 15 seconds.

公开(公告)号：US12119258B2

公开(公告)日：2024-10-15

申请号：US17623499

申请日：2020-03-25

Applicant: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES ,  Soitec

Inventor： Emmanuel Augendre ,  Frédéric Gaillard ,  Thomas Lorne ,  Emmanuel Rolland ,  Christelle Veytizou ,  Isabelle Bertrand ,  Frédéric Allibert

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/762 ,  H01L23/64

CPC classification number: H01L21/76254 ,  H01L21/02164 ,  H01L21/02203 ,  H01L23/64

Abstract: A semiconductor structure for radio frequency applications includes a support substrate made of silicon and comprising a mesoporous layer, a dielectric layer arranged on the mesoporous layer and a superficial layer arranged on the dielectric layer. The mesoporous layer comprises hollow pores, the internal walls of which are mainly lined with oxide. The mesoporous layer has a thickness between 3 and 40 microns and a resistivity greater than 20 kohm·cm over its entire thickness. The support substrate has a resistivity between 0.5 and 4 ohm·cm. The invention also relates to a method for producing such a semiconductor structure.

公开(公告)号：US20230005787A1

公开(公告)日：2023-01-05

申请号：US17756244

申请日：2020-11-25

Applicant: Soitec

Inventor： Young-Pil Kim ,  Daniel Delprat ,  Luciana Capello ,  Isabelle Bertrand ,  Frédéric Allibert

IPC: H01L21/762 ,  H01L23/66 ,  H01L27/12 ,  H01L21/02

Abstract: A handle substrate for a composite structure comprises a base substrate including an epitaxial layer of silicon on a monocrystalline silicon wafer obtained by Czochralski pulling, a passivation layer on and in contact with the epitaxial layer of silicon, and a charge-trapping layer on and in contact with the passivation layer. The monocrystalline silicon wafer of the base substrate exhibits a resistivity of between 10 and 500 ohm·cm, while the epitaxial layer of silicon exhibits a resistivity of greater than 2000 ohm·cm and a thickness ranging from 2 to 100 microns. The passivation layer is amorphous or polycrystalline. A method is described for forming such a substrate.

公开(公告)号：US11373856B2

公开(公告)日：2022-06-28

申请号：US16476415

申请日：2018-01-11

Applicant: Soitec

Inventor： Patrick Reynaud ,  Marcel Broekaart ,  Frederic Allibert ,  Christelle Veytizou ,  Luciana Capello ,  Isabelle Bertrand

IPC: H01L29/66 ,  H01L21/8238 ,  H01L21/02 ,  H01L21/762

Abstract: A support for a semiconductor structure includes a base substrate, a first silicon dioxide insulating layer positioned on the base substrate and having a thickness greater than 20 nm, and a charge trapping layer having a resistivity higher than 1000 ohm·cm and a thickness greater than 5 microns positioned on the first insulating layer.

公开(公告)号：US20200020520A1

公开(公告)日：2020-01-16

申请号：US16476415

申请日：2018-01-11

Applicant: Soitec

Inventor： Patrick Reynaud ,  Marcel Broekaart ,  Frederic Allibert ,  Christelle Veytizou ,  Luciana Capello ,  Isabelle Bertrand

IPC: H01L21/02 ,  H01L21/762

Abstract: A support for a semiconductor structure includes a base substrate, a first silicon dioxide insulating layer positioned on the base substrate and having a thickness greater than 20 nm, and a charge trapping layer having a resistivity higher than 1000 ohm·cm and a thickness greater than 5 microns positioned on the first insulating layer.

公开(公告)号：US20180130698A1

公开(公告)日：2018-05-10

申请号：US15803447

申请日：2017-11-03

Applicant: Soitec

Inventor： Oleg Kononchuk ,  Isabelle Bertrand ,  Luciana Capello ,  Marcel Broekaart

IPC: H01L21/762 ,  H01L21/324 ,  H01L27/12 ,  H01L21/02 ,  C30B29/06

CPC classification number: H01L21/02337 ,  C30B29/06 ,  H01L21/02002 ,  H01L21/02005 ,  H01L21/02008 ,  H01L21/02123 ,  H01L21/02255 ,  H01L21/02296 ,  H01L21/02381 ,  H01L21/2686 ,  H01L21/3226 ,  H01L21/324 ,  H01L21/76243 ,  H01L21/76251 ,  H01L21/76254 ,  H01L27/1203

Abstract: A method of fabrication of a semiconductor element includes a step of rapid heat treatment in which a substrate comprising a base having a resistivity greater than 1000 Ohm·cm is exposed to a peak temperature sufficient to deteriorate the resistivity of the base. The step of rapid heat treatment is followed by a curing heat treatment in which the substrate is exposed to a curing temperature between 800° C. and 1250° C. and then cooled at a cooldown rate less than 5° C./second when the curing temperature is between 1250° C. and 1150° C., less than 20° C./second when the curing temperature is between 1150° C. and 1100° C., and less than 50° C./second when the curing temperature is between 1100° C. and 800° C.