Method of manufacturing a variable resistance structure and method of manufacturing a phase-change memory device using the same
    12.
    发明授权
    Method of manufacturing a variable resistance structure and method of manufacturing a phase-change memory device using the same 有权
    制造可变电阻结构的方法以及使用其制造相变存储器件的方法

    公开(公告)号:US07803657B2

    公开(公告)日:2010-09-28

    申请号:US12654714

    申请日:2009-12-30

    IPC分类号: H01L21/44 H01L29/08 H01L29/18

    摘要: In methods of manufacturing a variable resistance structure and a phase-change memory device, after forming a first insulation layer on a substrate having a contact region, a contact hole exposing the contact region is formed through the first insulation layer. After forming a first conductive layer on the first insulation layer to fill up the contact hole, a first protection layer pattern is formed on the first conductive layer. The first conductive layer is partially etched to form a contact and to form a pad on the contact. A second protection layer is formed on the first protection layer pattern, and then an opening exposing the pad is formed through the second protection layer and the first protection layer pattern. After formation of a first electrode, a phase-change material layer pattern and a second electrode are formed on the first electrode and the second protection layer.

    摘要翻译: 在制造可变电阻结构和相变存储器件的方法中,在具有接触区域的基板上形成第一绝缘层之后,通过第一绝缘层形成暴露接触区域的接触孔。 在第一绝缘层上形成第一导电层以填充接触孔之后,在第一导电层上形成第一保护层图案。 部分地蚀刻第一导电层以形成接触并在接触件上形成焊盘。 在第一保护层图案上形成第二保护层,然后通过第二保护层和第一保护层图案形成露出焊盘的开口。 在形成第一电极之后,在第一电极和第二保护层上形成相变材料层图案和第二电极。

    Methods of forming a thin ferroelectric layer and methods of manufacturing a semiconductor device including the same
    16.
    发明授权
    Methods of forming a thin ferroelectric layer and methods of manufacturing a semiconductor device including the same 失效
    形成薄铁电体层的方法和制造其的半导体器件的制造方法

    公开(公告)号:US08124526B2

    公开(公告)日:2012-02-28

    申请号:US12503440

    申请日:2009-07-15

    IPC分类号: H01L21/4763

    摘要: In methods of forming a thin ferroelectric layer and methods of manufacturing a semiconductor device, a preliminary ferroelectric layer is formed on a substrate by depositing a metal oxide including lead, zirconium and titanium. The surface of the preliminary ferroelectric layer is polished using a slurry composition including an acrylic acid polymer, abrasive particles, and water to form a thin ferroelectric layer on the substrate. The slurry composition may reduce a polishing rate of the preliminary ferroelectric layer such that removal of a bulk portion of the preliminary ferroelectric layer may be suppressed and the surface roughness of the preliminary ferroelectric layer may be improved.

    摘要翻译: 在形成薄铁电体层的方法和制造半导体器件的方法中,通过沉积包括铅,锆和钛的金属氧化物,在衬底上形成初步铁电层。 使用包括丙烯酸聚合物,磨料颗粒和水的浆料组合物对预制铁电层的表面进行抛光,以在基材上形成薄铁电层。 浆料组合物可以降低预备铁电体层的抛光速率,从而可以抑制初级铁电层的体积部分的去除,并且可以提高预铁电层的表面粗糙度。

    Methods of fabricating semiconductor devices including channel layers having improved defect density and surface roughness characteristics
    17.
    发明授权
    Methods of fabricating semiconductor devices including channel layers having improved defect density and surface roughness characteristics 有权
    制造半导体器件的方法包括具有改进的缺陷密度和表面粗糙度特性的沟道层

    公开(公告)号:US07678625B2

    公开(公告)日:2010-03-16

    申请号:US11962742

    申请日:2007-12-21

    IPC分类号: H01L21/84

    摘要: A method of fabricating a semiconductor device including a channel layer includes forming a single crystalline semiconductor layer on a semiconductor substrate. The single crystalline semiconductor layer includes a protrusion extending from a surface thereof. A first polishing process is performed on the single crystalline semiconductor layer to remove a portion of the protrusion such that the single crystalline semiconductor layer includes a remaining portion of the protrusion. A second polishing process different from the first polishing process is performed to remove the remaining portion of the protrusion and define a substantially planar single crystalline semiconductor layer having a substantially uniform thickness. A sacrificial layer may be formed on the single crystalline semiconductor layer and used as a polish stop for the first polishing process to define a sacrificial layer pattern, which may be removed prior to the second polishing process. Related methods of fabricating stacked semiconductor memory devices are also discussed.

    摘要翻译: 制造包括沟道层的半导体器件的方法包括在半导体衬底上形成单晶半导体层。 单晶半导体层包括从其表面延伸的突起。 在单晶半导体层上执行第一抛光工艺以去除突起的一部分,使得单晶半导体层包括突起的剩余部分。 执行与第一抛光工艺不同的第二抛光工艺以去除突起的剩余部分并限定具有基本上均匀厚度的基本上平面的单晶半导体层。 可以在单晶半导体层上形成牺牲层,并且用作第一抛光工艺的抛光止挡件以限定可在第二抛光工艺之前去除的牺牲层图案。 还讨论了制造叠层半导体存储器件的相关方法。

    METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING CHANNEL LAYERS HAVING IMPROVED DEFECT DENSITY AND SURFACE ROUGHNESS CHARACTERISTICS
    19.
    发明申请
    METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING CHANNEL LAYERS HAVING IMPROVED DEFECT DENSITY AND SURFACE ROUGHNESS CHARACTERISTICS 有权
    制备半导体器件的方法,包括具有改善的缺陷密度和表面粗糙特性的通道层

    公开(公告)号:US20080160726A1

    公开(公告)日:2008-07-03

    申请号:US11962742

    申请日:2007-12-21

    IPC分类号: H01L21/20

    摘要: A method of fabricating a semiconductor device including a channel layer includes forming a single crystalline semiconductor layer on a semiconductor substrate. The single crystalline semiconductor layer includes a protrusion extending from a surface thereof. A first polishing process is performed on the single crystalline semiconductor layer to remove a portion of the protrusion such that the single crystalline semiconductor layer includes a remaining portion of the protrusion. A second polishing process different from the first polishing process is performed to remove the remaining portion of the protrusion and define a substantially planar single crystalline semiconductor layer having a substantially uniform thickness. A sacrificial layer may be formed on the single crystalline semiconductor layer and used as a polish stop for the first polishing process to define a sacrificial layer pattern, which may be removed prior to the second polishing process. Related methods of fabricating stacked semiconductor memory devices are also discussed.

    摘要翻译: 制造包括沟道层的半导体器件的方法包括在半导体衬底上形成单晶半导体层。 单晶半导体层包括从其表面延伸的突起。 在单晶半导体层上执行第一抛光工艺以去除突起的一部分,使得单晶半导体层包括突起的剩余部分。 执行与第一抛光工艺不同的第二抛光工艺以去除突起的剩余部分并限定具有基本上均匀厚度的基本上平面的单晶半导体层。 可以在单晶半导体层上形成牺牲层,并且用作第一抛光工艺的抛光止挡件以限定可在第二抛光工艺之前去除的牺牲层图案。 还讨论了制造叠层半导体存储器件的相关方法。

    METHODS OF RECYCLING A SUBSTRATE INCLUDING USING A CHEMICAL MECHANICAL POLISHING PROCESS
    20.
    发明申请
    METHODS OF RECYCLING A SUBSTRATE INCLUDING USING A CHEMICAL MECHANICAL POLISHING PROCESS 审中-公开
    回收包括使用化学机械抛光工艺的基板的方法

    公开(公告)号:US20080124930A1

    公开(公告)日:2008-05-29

    申请号:US11945359

    申请日:2007-11-27

    IPC分类号: H01L21/302

    摘要: In a method of recycling a substrate having an edge portion on which a stepped portion is formed, the substrate is chemically mechanically polished using a first slurry composition including fumed silica to remove the stepped portion. The substrate is then chemically mechanically polished using a second slurry composition including colloidal silica to improve the surface roughness of the substrate. The substrate having the edge region on which the stepped portion is formed may include a donor substrate used for manufacturing a silicon-on-insulator (SOI) substrate.

    摘要翻译: 在使具有形成阶梯部分的边缘部分的基板再循环的方法中,使用包括热解法二氧化硅的第一浆料组合物对基板进行化学机械抛光以去除台阶部分。 然后使用包含胶体二氧化硅的第二浆料组合物对衬底进行化学机械抛光,以改善衬底的表面粗糙度。 具有形成台阶部分的边缘区域的基板可以包括用于制造绝缘体上硅(SOI)衬底的施主衬底。