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公开(公告)号:US11796606B2
公开(公告)日:2023-10-24
申请号:US17509836
申请日:2021-10-25
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Aniruddha Roy , Nitin Agarwal , Preetham Narayana Reddy
IPC: G01R31/52 , H03B5/12 , H03K3/0231 , H03K4/502
CPC classification number: G01R31/52 , H03B5/1203 , H03K3/0231 , H03K4/502
Abstract: In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror and an amplifier, where the amplifier is coupled to a pin on the chip, and where the pin is adapted to be coupled to an external resistor, where the external resistor is external to the chip. The oscillator circuit also includes oscillator circuitry coupled to the charging current generator, where the oscillator circuitry includes a comparator, a phase generator, a first capacitor coupled to a first switch, and a second capacitor coupled to a second switch. The oscillator circuit includes leakage circuitry coupled to the current mirror, where the leakage circuitry is configured to draw a current from the current mirror proportional to a leakage current flowing through the external resistor from circuitry internal to the chip.
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公开(公告)号:US11742810B2
公开(公告)日:2023-08-29
申请号:US17379046
申请日:2021-07-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Nitin Agarwal , Aniruddha Roy
CPC classification number: H03F3/3016 , H03F1/223 , H03F2200/129
Abstract: A class AB buffer includes an output stage and an input stage. The output stage includes a first output transistor and a second output transistor. The second output transistor is coupled to the first output transistor. The input stage is coupled to the output stage. The input stage includes a first cascode transistor, a first switch, a second cascode transistor, and a second switch. The first switch is coupled to the first cascode transistor and the first output transistor. The second switch is coupled to the first switch, the second cascode transistor, and the first output transistor.
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公开(公告)号:US10763832B2
公开(公告)日:2020-09-01
申请号:US15853015
申请日:2017-12-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Aniruddha Roy , Nitin Agarwal , Rajavelu Thinakaran
IPC: H03K3/0231 , H03K4/502 , H03K3/011
Abstract: Trimming components within an oscillator comprising: a trim-capable current source, wherein the trim-capable current source comprises a trimmable resistor and a trimmable current component, a comparator comprising a first input terminal that couples to the trim-capable current source and the second input terminal that couples to a reference voltage source, a switch coupled to the first input terminal and the trim-capable current source, and a trim-capable capacitor coupled to the switch, wherein the switch is coupled between the trim-capable capacitor and the trim-capable current source.
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公开(公告)号:US11750155B2
公开(公告)日:2023-09-05
申请号:US17470985
申请日:2021-09-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Aniruddha Roy , Kunal Suresh Karanjkar
CPC classification number: H03F3/20
Abstract: Aspects of the description provide for a circuit. In some examples, the circuit includes a input pair of transistors, a bias transistor having a bias transistor gate, a bias transistor drain, and a bias transistor source, the bias transistor drain coupled to the input pair of transistors and the bias transistor source coupled to ground, and a resistor coupled between the bias transistor gate and the input pair of transistors.
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15.
公开(公告)号:US20230043133A1
公开(公告)日:2023-02-09
申请号:US17903128
申请日:2022-09-06
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Nitin Agarwal , Aniruddha Roy , Preetham Narayana Reddy
Abstract: In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror and an amplifier, where the amplifier is coupled to a pin of the chip. The oscillator circuit also includes a first switch coupled to the pin, a second switch coupled to the pin and to a charging resistor, and a third switch coupled to the amplifier and an internal resistor, where the internal resistor is internal to the chip. The oscillator circuit includes a bias current source coupled to the current mirror. The system includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system also includes an external capacitor coupled to the pin and coupled in parallel to the external resistor, where the external capacitor is external to the chip.
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公开(公告)号:US11387814B2
公开(公告)日:2022-07-12
申请号:US17008466
申请日:2020-08-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Aniruddha Roy , Nitin Agarwal , Rajavelu Thinakaran
Abstract: Trimming components within an oscillator comprising: a trim-capable current source, wherein the trim-capable current source comprises a trimmable resistor and a trimmable current component, a comparator comprising a first input terminal that couples to the trim-capable current source and the second input terminal that couples to a reference voltage source, a switch coupled to the first input terminal and the trim-capable current source, and a trim-capable capacitor coupled to the switch, wherein the switch is coupled between the trim-capable capacitor and the trim-capable current source.
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公开(公告)号:US11025213B2
公开(公告)日:2021-06-01
申请号:US16437188
申请日:2019-06-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Aniruddha Roy , Saurabh Pandey
Abstract: A circuit includes a first transconductance stage having an output. The circuit further includes an output transconductance stage, and a first source-degenerated transistor having a first control input and first and second current terminals. The first control input is coupled to the output of the first transconductance stage. The circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal is coupled to the second current terminal and to the output transconductance stage.
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公开(公告)号:US09742369B2
公开(公告)日:2017-08-22
申请号:US15144531
申请日:2016-05-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Nitin Agarwal , Aniruddha Roy
CPC classification number: H03G1/0094 , H02M3/07 , H03G1/0029 , H03G3/001 , H03G5/28 , H03K5/08
Abstract: A compensation circuit includes an amplifier coupled between a first voltage terminal and a common terminal. The amplifier has a first output terminal. A current source transistor has a current path coupled between a second voltage terminal and a second output terminal. A threshold voltage sense transistor has a current path coupled between the first and second output terminals. A gate and drain of the threshold voltage sense transistor are connected. An output transistor having a current path coupled between the first output terminal and a third output terminal has a gate coupled to the second output terminal.
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公开(公告)号:US09692378B2
公开(公告)日:2017-06-27
申请号:US15258034
申请日:2016-09-07
Applicant: Texas Instruments Incorporated
Inventor: Aniruddha Roy , Nitin Agarwal
CPC classification number: H03G1/0088 , H03F3/45475 , H03F2203/45026 , H03F2203/45048 , H03F2203/45522 , H03F2203/45534 , H03G1/0023 , H03G1/0029 , H03G3/001
Abstract: Disclosed examples include programmable gain amplifier (PGA) circuits with an operation amplifier circuit having a first amplifier input and a second amplifier input including a plurality of second input nodes, a resistor array including a plurality of resistor sections connected in series with one another between the amplifier output and a reference voltage node, and a trim select circuit coupled between the second amplifier input and the resistor array circuit to deliver a feedback voltage signal to each individual one of the second input nodes from a given selected one of a plurality of the tap points of the resistor array circuit according to a trim code to provide analog gain trimming by interpolation.
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公开(公告)号:US20170149397A1
公开(公告)日:2017-05-25
申请号:US15258034
申请日:2016-09-07
Applicant: Texas Instruments Incorporated
Inventor: Aniruddha Roy , Nitin Agarwal
CPC classification number: H03G1/0088 , H03F3/45475 , H03F2203/45026 , H03F2203/45048 , H03F2203/45522 , H03F2203/45534 , H03G1/0023 , H03G1/0029 , H03G3/001
Abstract: Disclosed examples include programmable gain amplifier (PGA) circuits with an operation amplifier circuit having a first amplifier input and a second amplifier input including a plurality of second input nodes, a resistor array including a plurality of resistor sections connected in series with one another between the amplifier output and a reference voltage node, and a trim select circuit coupled between the second amplifier input and the resistor array circuit to deliver a feedback voltage signal to each individual one of the second input nodes from a given selected one of a plurality of the tap points of the resistor array circuit according to a trim code to provide analog gain trimming by interpolation.
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